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Message-Id: <20220405070358.156350707@linuxfoundation.org>
Date: Tue, 5 Apr 2022 09:27:53 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org,
Codrin Ciubotariu <codrin.ciubotariu@...rochip.com>,
Claudiu Beznea <claudiu.beznea@...rochip.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.15 611/913] clk: at91: sama7g5: fix parents of PDMCs GCLK
From: Codrin Ciubotariu <codrin.ciubotariu@...rochip.com>
[ Upstream commit 1a944729d8635fa59638f24e8727d5ccaa0c8c19 ]
Audio PLL can be used as parent by the GCLKs of PDMCs.
Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@...rochip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@...rochip.com>
Link: https://lore.kernel.org/r/20220304182616.1920392-1-codrin.ciubotariu@microchip.com
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
drivers/clk/at91/sama7g5.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 019e712f90d6..9eed97a299d0 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -687,16 +687,16 @@ static const struct {
{ .n = "pdmc0_gclk",
.id = 68,
.r = { .max = 50000000 },
- .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
- .pp_mux_table = { 5, 8, },
+ .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
+ .pp_mux_table = { 5, 9, },
.pp_count = 2,
.pp_chg_id = INT_MIN, },
{ .n = "pdmc1_gclk",
.id = 69,
.r = { .max = 50000000, },
- .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
- .pp_mux_table = { 5, 8, },
+ .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
+ .pp_mux_table = { 5, 9, },
.pp_count = 2,
.pp_chg_id = INT_MIN, },
--
2.34.1
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