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Message-ID: <0e6d110d-0637-2be8-cab0-9d936668fa7b@collabora.com>
Date: Wed, 6 Apr 2022 12:51:34 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Rex-BC Chen <rex-bc.chen@...iatek.com>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzk+dt@...nel.org" <krzk+dt@...nel.org>
Cc: "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
"airlied@...ux.ie" <airlied@...ux.ie>,
Yongqiang Niu (牛永强)
<yongqiang.niu@...iatek.com>,
Jason-JH Lin (林睿祥)
<Jason-JH.Lin@...iatek.com>,
Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
Allen-KH Cheng (程冠勳)
<Allen-KH.Cheng@...iatek.com>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"linux-mediatek@...ts.infradead.org"
<linux-mediatek@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH 3/3] dt-bindings: display: mediatek: Correct disp_aal
binding for MT8192
Il 06/04/22 12:48, Rex-BC Chen ha scritto:
> On Wed, 2022-04-06 at 18:40 +0800, AngeloGioacchino Del Regno wrote:
>> Il 06/04/22 11:46, Rex-BC Chen ha scritto:
>>> The driver data for MT8192 is the same with MT8183. Therefore, we
>>> correct it.
>>>
>>> Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
>>
>> Reviewed-by: AngeloGioacchino Del Regno <
>> angelogioacchino.delregno@...labora.com>
>>
>> ...though, from what I know, you should also move MT8195 down there!
>
> Hello Angelo,
>
> Thanks for your review.
> But for MT8195, disp_aal is using the same compatible with MT8173.
>
> From the MT8195 project DTS is using:
>
> aal0: disp_aal@...05000 {
> compatible = "mediatek,mt8195-disp-aal",
> "mediatek,mt8173-disp-aal";
> reg = <0 0x1c005000 0 0x1000>;
> interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
> power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
> clocks = <&vdosys0 CLK_VDO0_DISP_AAL0>;
> mediatek,gce-client-reg =
> <&gce0 SUBSYS_1c00XXXX 0x5000 0x1000>;
> };
>
> BRs,
> Rex
>
I'm sorry Rex, I've just realized - I was confusing this one with the
8195 gamma binding instead!
Cheers,
Angelo
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