Message-ID: <CAHpNFcObr9v28HTpqKS=eAKC5wV2z7k0NaVXz94ga6JN1kJ_vA@mail.gmail.com>
Date:   Wed, 6 Apr 2022 14:57:14 +0100
From:   Duke Abbaddon <duke.abbaddon@...il.com>
To:     torvalds@...ux-foundation.org
Subject: Display Stream Compression Support - 3D Mux , 3D Mu-X by GPU & CPU
 though SiMD & AVX 32Bit IfNotOR to a Singular planar Frame Buffer

https://lkml.org/lkml/2022/4/6/401

*
[PATCH v7 13/14] drm/msm: Update generated headers Vinod Koul
  [PATCH v7 07/14] drm/msm/disp/dpu1: Add support for DSC in encoder Vinod Koul
  [PATCH v7 09/14] drm/msm: Add missing num_dspp field documentation Vinod Koul
  [PATCH v7 06/14] drm/msm/disp/dpu1: Add DSC support in hw_ctl Vinod Koul
  [PATCH v7 08/14] drm/msm/dpu: don't use merge_3d if DSC merge topo
... Vinod Koul
  [PATCH v7 03/14] drm/msm/disp/dpu1: Add support for DSC Vinod Koul
  [PATCH v7 01/14] drm/msm/dsi: add support for dsc data Vinod Koul
[New] [PATCH v7 00/14] drm/msm: Add Display Stream Compression Support
Vinod Koul
*
3D Mux , 3D Mu-X by GPU & CPU though SiMD & AVX 32Bit IfNotOR to a
Single planar Frame Buffer is logical in the case of Multi Window
desktops,
A Blitter Frame Works well for X-OR.

The relevance is that a Single Frame buffer per Eye does 3D Imagery!
(Google Glass & MS & PS4 VR)

We can and will need more; For this Substance Called Flexibility we
need 2 Details:

ReDirectable DMA & Multi Frame Blitter...

By this method we can literally write every detail if we wish in
Shader, But we do not need to worry!

X-OR Blitter Recovers from Overwrite by detecting details that are new.

Simple is best but keep in mind that CPU Frame Buffer (In RAM & Cache)
& GPU Frame Buffer (in GPU) & Direct Access RAM : ReBAR to
Transparently access GPU RAM!

Allowing ALL.

****

Vector Compression VESA Standard Display protocol 3 +
DSC : Zero compression or low level compression version of DSC
1.2bc

Frame by Frame compression with vector prediction.

X-OR Frame Buffer Compression & Blank Space Compression:

X-OR X=1 New Data & X=0 being not sent,
Therefore Masking the frame buffer,

A Frame buffer needs a cleared aria; A curve or ellipsoid for example,
Draw the ellipsoid; This is the mask & can be in 3 levels:

X-OR : Draw or not Draw Aria : Blitter XOR
AND : Draw 1 Value & The other : Blitter Additive
Variable Value Resistor : Draw 1 Value +- The other : Blitter + or - Modifier
*

Vector Compression VESA Standard Display protocol 3 : RS

SiMD Render - Vector Graphics, Boxes, Ellipses, Curves & Fonts
Improve Console & TV & BIOS & General Animated Render

Vector Display Standards with low relative CPU Weight
SiMD Polygon Font Method Render

Default option point scaling (the space) : Metadata Vector Fonts with
Curl mathematical vector :

16 Bit : SiMD 1 width
32 Bit : SiMD Double Width

High precision for AVX 32Bit to 256Bit width precision.

Vectoring with SiMD allows traditional CPU mastered VESA Emulation
desktops & safe mode to be super fast & displays to conform to VESA
render standards with little effort & a 1MB Table ROM.

Though the VESA & HDMI & DisplayPort standards Facilitates direct low
bandwidth transport of and transformation of 3D & 2D graphics & fonts
into directly Rendered Super High Fidelity SiMD & AVX Rendering Vector

Display Standards Vector Render : DSVR-SiMD Can and will be directly
rendered to a Surface for visual element : SfVE-Vec

As such transport of Vectors & transformation onto display (Monitor,
3D Unit, Render, TV, & Though HDMI, PCI Port & DP & RAM)

Directly resolve The total graphics pipeline into high quality output
or input & allow communication of almost infinite Floating point
values for all rendered 3D & 2D Elements on a given surface (RAM
Render Page or Surface)

In high precision that is almost unbeatable & yet consumes many levels
less RAM & Transport Protocol bandwidth,

Further more can also render Vector 3D & 2D Audio & other elements
though Vector 'Fonting' Systems, Examples exist : 3D Wave Tables,
Harmonic reproduction units for example Yamaha and Casio keyboards.

"QFT a Zero compression or low level compression version of DSC
1.2bc

X-OR Frame Buffer Compression & Blank Space Compression:
Vector Compression VESA Standard Display protocol 3"

"QFT transports each frame at a higher rate to decrease “display
latency”, which is the amount of time between a frame being ready for
transport in the GPU and that frame being completely displayed. This
latency is the sum of the transport time through the source’s output
circuits, the transport time across the interface, the processing of
the video data in the display, and the painting of the screen with the
new data. This overall latency affects the responsiveness of games:
how long it appears between a button is pressed to the time at which
the resultant action is observed on the screen.


While there are a lot of variables in this equation, not many are
adjustable from an HDMI specification perspective. QFT operates on the
transport portion of this equation by reducing the time it takes to
send only the active video across the cable. This results in reduced
display latency and increased responsiveness."
*

(c)Rupert S

Include vector today *important* RS
https://vesa.org/vesa-display-compression-codecs/

https://science.n-helix.com/2016/04/3d-desktop-virtualization.html

https://science.n-helix.com/2019/06/vulkan-stack.html

https://science.n-helix.com/2019/06/kernel.html

https://science.n-helix.com/2022/03/fsr-focal-length.html

https://science.n-helix.com/2018/01/integer-floats-with-remainder-theory.html

https://bit.ly/VESA_BT

Rupert S

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