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Message-ID: <Yk2uGHsu49/seLMT@robh.at.kernel.org>
Date:   Wed, 6 Apr 2022 10:13:28 -0500
From:   Rob Herring <robh@...nel.org>
To:     Daniel Lezcano <daniel.lezcano@...aro.org>
Cc:     Krzysztof Kozlowski <krzk@...nel.org>, shruthi.sanil@...el.com,
        tglx@...utronix.de, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, andriy.shevchenko@...ux.intel.com,
        mgross@...ux.intel.com, srikanth.thokala@...el.com,
        lakshmi.bai.raja.subramanian@...el.com,
        mallikarjunappa.sangannavar@...el.com
Subject: Re: [PATCH v10 1/2] dt-bindings: timer: Add bindings for Intel Keem
 Bay SoC Timer

On Wed, Apr 06, 2022 at 10:06:00AM +0200, Daniel Lezcano wrote:
> 
> Hi Rob,
> 
> On 30/03/2022 13:55, Krzysztof Kozlowski wrote:
> > On 30/03/2022 13:44, Daniel Lezcano wrote:
> > > On 22/03/2022 14:00, shruthi.sanil@...el.com wrote:
> > > > From: Shruthi Sanil <shruthi.sanil@...el.com>
> > > > 
> > > > Add Device Tree bindings for the Timer IP, which can be used as
> > > > clocksource and clockevent device in the Intel Keem Bay SoC.
> > > > 
> > > > Reviewed-by: Andy Shevchenko <andriy.shevchenko@...el.com>
> > > > Signed-off-by: Shruthi Sanil <shruthi.sanil@...el.com>
> > > 
> > > 
> > > In order to pick this binding I need an ack from Rob or Krzysztof (added
> > > to the recipients)
> > 
> > Rob was looking into this and there were some comments around v8, so I
> > will leave it to him.
> 
> whenever possible could you review this patch, so I can merge the series
> which has been a long on the mailing list ?

I did... Multiple times.

I don't see any need for 1 node per counter. I don't find 'it might be 
synthesized with a different number of counters' a convincing argument.

Rob

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