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Message-ID: <CAJKOXPfWH-XSogkWVy0Q5LcHSk9SXinR7AA_Odo-oTc32y1Ykg@mail.gmail.com>
Date: Wed, 6 Apr 2022 17:38:35 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jianjun Wang <jianjun.wang@...iatek.com>
Cc: Chunfeng Yun <chunfeng.yun@...iatek.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Chen-Yu Tsai <wenst@...omium.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Wei-Shun Chang <weishunc@...gle.com>,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
rex-bc.chen@...iatek.com, randy.wu@...iatek.com,
jieyy.yang@...iatek.com, chuanjia.liu@...iatek.com,
qizhong.cheng@...iatek.com, jian.yang@...iatek.com
Subject: Re: [PATCH v5 0/2] phy: mediatek: Add PCIe PHY driver
On Wed, 6 Apr 2022 at 07:47, Jianjun Wang <jianjun.wang@...iatek.com> wrote:
>
> Hello Maintainers,
>
> Is there anything I can do to get these patches merged?
Patience. :) You posted a patch during the merge window which finished
three days ago, so basically one can assume you ping folks after three
days. Three days is too fast for pinging. :(
Best regards,
Krzysztof
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