linux-kernel - [PATCH 00/12] Introducing AMD x2APIC Virtualization (x2AVIC) support.

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Date:   Tue, 5 Apr 2022 18:08:43 -0500
From:   Suravee Suthikulpanit <suravee.suthikulpanit@....com>
To:     <linux-kernel@...r.kernel.org>, <kvm@...r.kernel.org>,
        <x86@...nel.org>
CC:     <mlevitsk@...hat.com>, <seanjc@...gle.com>, <pbonzini@...hat.com>,
        <joro@...tes.org>, <tglx@...utronix.de>, <mingo@...hat.com>,
        <bp@...en8.de>, <peterz@...radead.org>, <hpa@...or.com>,
        <jon.grimm@....com>, <wei.huang2@....com>, <terry.bowman@....com>,
        Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: [PATCH 00/12] Introducing AMD x2APIC Virtualization (x2AVIC) support.

Previously, with AVIC, guest needs to disable x2APIC capability and
can only run in APIC mode to activate hardware-accelerated interrupt
virtualization.  With x2AVIC, guest can run in x2APIC mode.
This feature is indicated by the CPUID Fn8000_000A EDX[14],
and it can be activated by setting bit 31 (enable AVIC) and
bit 30 (x2APIC mode) of VMCB offset 60h.

The mode of interrupt virtualization can dynamically change during runtime.
For example, when AVIC is enabled, the hypervisor currently keeps track of
the AVIC activation and set the VMCB bit 31 accordingly. With x2AVIC,
the guest OS can also switch between APIC and x2APIC modes during runtime.
The kvm_amd driver needs to also keep track and set the VMCB
bit 30 accordingly. 

Besides, for x2AVIC, kvm_amd driver needs to disable interception for the
x2APIC MSR range to allow AVIC hardware to virtualize register accesses.

Testing:
  * This series has been tested booting a Linux VM with x2APIC physical
    and logical modes upto 512 vCPUs.

Regards,
Suravee

Change from RFCv2 (https://lore.kernel.org/all/5876774a-c188-2026-1328-a4292022832b@amd.com/t/)
  * Rebase to v5.17
  * Clean up based on review comments from Maxim (Thank!!)
  * Patch 6/12: Remove the kvm_get_apic_id() introduced in RFCv2, and
    simply do not support updating physical and logical ID when in x2APIC mode.
  * Patch 7/12: Extend the svm_direct_access_msrs to include x2APIC MSR range
    instead of declaring a new data structure. 
  * Patch 8/12: Remove force svm_refresh_apicv_exec_ctrl(), and do not
    update avic_vapic_bar.
  * Patch 12/12: New to this series.

Suravee Suthikulpanit (12):
  x86/cpufeatures: Introduce x2AVIC CPUID bit
  KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to
    [GET/SET]_XAPIC_DEST_FIELD
  KVM: SVM: Detect X2APIC virtualization (x2AVIC) support
  KVM: SVM: Update max number of vCPUs supported for x2AVIC mode
  KVM: SVM: Update avic_kick_target_vcpus to support 32-bit APIC ID
  KVM: SVM: Do not support updating APIC ID when in x2APIC mode
  KVM: SVM: Adding support for configuring x2APIC MSRs interception
  KVM: SVM: Update AVIC settings when changing APIC mode
  KVM: SVM: Introduce helper functions to (de)activate AVIC and x2AVIC
  KVM: SVM: Do not throw warning when calling avic_vcpu_load on a
    running vcpu
  KVM: SVM: Do not inhibit APICv when x2APIC is present
  kvm/x86: Remove APICV activate mode inconsistency check

 arch/x86/hyperv/hv_apic.c          |   2 +-
 arch/x86/include/asm/apicdef.h     |   4 +-
 arch/x86/include/asm/cpufeatures.h |   1 +
 arch/x86/include/asm/svm.h         |  16 ++-
 arch/x86/kernel/apic/apic.c        |   2 +-
 arch/x86/kernel/apic/ipi.c         |   2 +-
 arch/x86/kvm/lapic.c               |   2 +-
 arch/x86/kvm/svm/avic.c            | 151 ++++++++++++++++++++++++++---
 arch/x86/kvm/svm/svm.c             |  56 ++++++-----
 arch/x86/kvm/svm/svm.h             |   7 +-
 arch/x86/kvm/x86.c                 |  13 +--
 11 files changed, 202 insertions(+), 54 deletions(-)

-- 
2.25.1