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Message-ID: <645fbdd4-99d1-90e3-04f1-a88be135c1d7@alliedtelesis.co.nz>
Date: Wed, 6 Apr 2022 23:29:06 +0000
From: Chris Packham <Chris.Packham@...iedtelesis.co.nz>
To: Andrew Lunn <andrew@...n.ch>
CC: "linus.walleij@...aro.org" <linus.walleij@...aro.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"catalin.marinas@....com" <catalin.marinas@....com>,
"will@...nel.org" <will@...nel.org>,
"gregory.clement@...tlin.com" <gregory.clement@...tlin.com>,
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"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
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<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3 3/4] arm64: dts: marvell: Add Armada 98DX2530 SoC and
RD-AC5X board
On 7/04/22 11:23, Andrew Lunn wrote:
> On Wed, Apr 06, 2022 at 03:21:57PM +1200, Chris Packham wrote:
>> The 98DX2530 SoC is the Control and Management CPU integrated into
>> the Marvell 98DX25xx and 98DX35xx series of switch chip (internally
>> referred to as AlleyCat5 and AlleyCat5X).
>>
>> These files have been taken from the Marvell SDK and lightly cleaned
>> up with the License and copyright retained.
>>
>> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
>> +ð0 {
>> + status = "okay";
>> + phy = <&phy0>;
> This is O.K, but most DT files now use phy-handle, not phy.
I'll update to phy-handle for v4
>
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
>
> Andrew
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