linux-kernel - Re: [PATCH 1/1] soc/tegra: fuse: Add nvmem cell lookup entries for tegra194

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 5 Apr 2022 13:44:07 +0100
From:   Jon Hunter <jonathanh@...dia.com>
To:     Sagar Kamble <skamble@...dia.com>, thierry.reding@...il.com,
        digetx@...il.com, yangyingliang@...wei.com,
        ndesaulniers@...gle.com, pshete@...dia.com, nathan@...nel.org,
        kkartik@...dia.com, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/1] soc/tegra: fuse: Add nvmem cell lookup entries for
 tegra194


On 24/03/2022 12:08, Sagar Kamble wrote:
> Add nvmem cell lookup entries for below fuse cells:
>   - gcplex-config-fuse
>   - pdi0
>   - pdi1
> 
> Also include the device name prefix "gpu-" in the names of the gpu fuse
> cells in nvmem_cell_info.
> 
> Signed-off-by: Sagar Kamble <skamble@...dia.com>
> ---
>   drivers/soc/tegra/fuse/fuse-tegra.c   |  8 ++++----
>   drivers/soc/tegra/fuse/fuse-tegra30.c | 17 ++++++++++++++++-
>   2 files changed, 20 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
> index aa94fda282f4..b0a8405dbdb1 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra.c
> @@ -1,6 +1,6 @@
>   // SPDX-License-Identifier: GPL-2.0-only
>   /*
> - * Copyright (c) 2013-2021, NVIDIA CORPORATION.  All rights reserved.
> + * Copyright (c) 2013-2022, NVIDIA CORPORATION.  All rights reserved.
>    */
>   
>   #include <linux/clk.h>
> @@ -162,7 +162,7 @@ static const struct nvmem_cell_info tegra_fuse_cells[] = {
>   		.bit_offset = 0,
>   		.nbits = 32,
>   	}, {
> -		.name = "gcplex-config-fuse",
> +		.name = "gpu-gcplex-config-fuse",
>   		.offset = 0x1c8,
>   		.bytes = 4,
>   		.bit_offset = 0,
> @@ -186,13 +186,13 @@ static const struct nvmem_cell_info tegra_fuse_cells[] = {
>   		.bit_offset = 0,
>   		.nbits = 32,
>   	}, {
> -		.name = "pdi0",
> +		.name = "gpu-pdi0",
>   		.offset = 0x300,
>   		.bytes = 4,
>   		.bit_offset = 0,
>   		.nbits = 32,
>   	}, {
> -		.name = "pdi1",
> +		.name = "gpu-pdi1",
>   		.offset = 0x304,
>   		.bytes = 4,
>   		.bit_offset = 0,
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
> index b071d433d74f..f01d8a2547b6 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra30.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
> @@ -1,6 +1,6 @@
>   // SPDX-License-Identifier: GPL-2.0-only
>   /*
> - * Copyright (c) 2013-2014, NVIDIA CORPORATION.  All rights reserved.
> + * Copyright (c) 2013-2022, NVIDIA CORPORATION.  All rights reserved.
>    */
>   
>   #include <linux/device.h>
> @@ -344,6 +344,21 @@ static const struct nvmem_cell_lookup tegra194_fuse_lookups[] = {
>   		.cell_name = "xusb-pad-calibration-ext",
>   		.dev_id = "3520000.padctl",
>   		.con_id = "calibration-ext",
> +	}, {
> +		.nvmem_name = "fuse",
> +		.cell_name = "gpu-gcplex-config-fuse",
> +		.dev_id = "17000000.gpu",
> +		.con_id = "gcplex-config-fuse",
> +	}, {
> +		.nvmem_name = "fuse",
> +		.cell_name = "gpu-pdi0",
> +		.dev_id = "17000000.gpu",
> +		.con_id = "pdi0",
> +	}, {
> +		.nvmem_name = "fuse",
> +		.cell_name = "gpu-pdi1",
> +		.dev_id = "17000000.gpu",
> +		.con_id = "pdi1",
>   	},
>   };
>   

Thanks! Looks good to me.

Reviewed-by: Jon Hunter <jonathanh@...dia.com>

Jon

-- 
nvpublic