linux-kernel - [PATCH v2 0/3] irqchip/gic-v3: Assorted improvements

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <20220405183857.205960-1-maz@kernel.org>
Date:   Tue,  5 Apr 2022 19:38:54 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     linux-kernel@...r.kernel.org
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Andre Przywara <andre.przywara@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Eric Auger <eric.auger@...hat.com>
Subject: [PATCH v2 0/3] irqchip/gic-v3: Assorted improvements

This is a small series that happens on the back of [0] (implementing
additional features in KVM's vgic) and allows for a couple of
performance optimisations.

Thanks,

        M.

* From v1 [1]:
  - Moved the RWP polling fix to -fixes, to be merged independently
  - Fixed bit numbers for CES and IR
  - Added some comments about the respective relations between
    DirectLPIs, RVPEID and IR.
  - Some cosmetic changes
  - Rebased on 5.18-rc1

[0] https://lore.kernel.org/r/20220405182327.205520-1-maz@kernel.org
[1] https://lore.kernel.org/r/20220315165034.794482-1-maz@kernel.org

Marc Zyngier (3):
  irqchip/gic-v3: Exposes bit values for GICR_CTLR.{IR,CES}
  irqchip/gic-v3: Detect LPI invalidation MMIO registers
  irqchip/gic-v3: Relax polling of GIC{R,D}_CTLR.RWP

 drivers/irqchip/irq-gic-v3.c       | 58 +++++++++++++++++-------------
 include/linux/irqchip/arm-gic-v3.h |  2 ++
 2 files changed, 36 insertions(+), 24 deletions(-)

-- 
2.34.1