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Message-ID: <CADnq5_Ogke7XuVsQaB8pskreXam1ASTE2jna=U6iuKuuyR4r-Q@mail.gmail.com>
Date: Thu, 7 Apr 2022 11:52:22 -0400
From: Alex Deucher <alexdeucher@...il.com>
To: Harry Wentland <harry.wentland@....com>
Cc: Haowen Bai <baihaowen@...zu.com>, Leo Li <sunpeng.li@....com>,
Rodrigo Siqueira <Rodrigo.Siqueira@....com>,
Alex Deucher <alexander.deucher@....com>,
Christian König <christian.koenig@....com>,
"Pan, Xinhui" <Xinhui.Pan@....com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
amd-gfx list <amd-gfx@...ts.freedesktop.org>,
Maling list - DRI developers
<dri-devel@...ts.freedesktop.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/amd/display: Fix indenting mistakes in dcn10_hw_sequencer.c
Applied. Thanks!
Alex
On Thu, Apr 7, 2022 at 10:18 AM Harry Wentland <harry.wentland@....com> wrote:
>
>
>
> On 2022-04-07 02:00, Haowen Bai wrote:
> > Smatch reports the following:
> > drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2174
> > dcn10_enable_vblanks_synchronization() warn: if statement not indented
> >
> > Signed-off-by: Haowen Bai <baihaowen@...zu.com>
>
> Reviewed-by: Harry Wentland <harry.wentland@....com>
>
> Harry
>
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 14 +++++++-------
> > 1 file changed, 7 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> > index ee22f4422d26..3c338b85040c 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> > @@ -2172,13 +2172,13 @@ void dcn10_enable_vblanks_synchronization(
> > if (master >= 0) {
> > for (i = 0; i < group_size; i++) {
> > if (i != master && !grouped_pipes[i]->stream->has_non_synchronizable_pclk)
> > - grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(
> > - grouped_pipes[master]->stream_res.tg,
> > - grouped_pipes[i]->stream_res.tg,
> > - grouped_pipes[master]->stream->timing.pix_clk_100hz,
> > - grouped_pipes[i]->stream->timing.pix_clk_100hz,
> > - get_clock_divider(grouped_pipes[master], false),
> > - get_clock_divider(grouped_pipes[i], false));
> > + grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(
> > + grouped_pipes[master]->stream_res.tg,
> > + grouped_pipes[i]->stream_res.tg,
> > + grouped_pipes[master]->stream->timing.pix_clk_100hz,
> > + grouped_pipes[i]->stream->timing.pix_clk_100hz,
> > + get_clock_divider(grouped_pipes[master], false),
> > + get_clock_divider(grouped_pipes[i], false));
> > grouped_pipes[i]->stream->vblank_synchronized = true;
> > }
> > grouped_pipes[master]->stream->vblank_synchronized = true;
>
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