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Message-ID: <1f66f2e10041f95d8780f294c7f951f4b518395f.camel@intel.com>
Date:   Thu, 07 Apr 2022 15:05:29 +1200
From:   Kai Huang <kai.huang@...el.com>
To:     isaku.yamahata@...el.com, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     isaku.yamahata@...il.com, Paolo Bonzini <pbonzini@...hat.com>,
        Jim Mattson <jmattson@...gle.com>, erdemaktas@...gle.com,
        Connor Kuehl <ckuehl@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>
Subject: Re: [RFC PATCH v5 042/104] KVM: x86/mmu: Track shadow MMIO
 value/mask on a per-VM basis

On Wed, 2022-04-06 at 23:06 +1200, Kai Huang wrote:
> >   void kvm_mmu_reset_all_pte_masks(void)
> >   {
> >   	u8 low_phys_bits;
> > -	u64 mask;
> >   
> >   	shadow_phys_bits = kvm_get_shadow_phys_bits();
> >   
> > @@ -389,9 +383,13 @@ void kvm_mmu_reset_all_pte_masks(void)
> >   	 * PTEs and so the reserved PA approach must be disabled.
> >   	 */
> >   	if (shadow_phys_bits < 52)
> > -		mask = BIT_ULL(51) | PT_PRESENT_MASK;
> > +		shadow_default_mmio_mask = BIT_ULL(51) | PT_PRESENT_MASK;
> 
> Hmm...  Not related to this patch, but it seems there's a bug here.  On a
> MKTME
> enabled system (but not TDX) with 52 physical bits, the shadow_phys_bits will
> be
> set to < 52 (depending on how many MKTME KeyIDs are configured by BIOS).  In
> this case, bit 51 is set, but actually bit 51 isn't a reserved bit in this
> case.
> Instead, it is a MKTME KeyID bit.  Therefore, above setting won't cause #PF,
> but
> will use a non-zero MKTME keyID to access the physical address.
> 
> Paolo/Sean, any comments here?

After looking at the code more carefully, this is not correct.  shadow_phys_bits
will be 52 on a MKTME-enabled system.  Please ignore this.

-- 
Thanks,
-Kai


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