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Message-ID: <20220407105420.10765-1-kavyasree.kotagiri@microchip.com>
Date: Thu, 7 Apr 2022 16:24:20 +0530
From: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
To: <broonie@...nel.org>, <robh+dt@...nel.org>, <krzk+dt@...nel.org>
CC: <nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<claudiu.beznea@...rochip.com>, <tudor.ambarus@...rochip.com>,
<linux-spi@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <UNGLinuxDriver@...rochip.com>,
<Kavyasree.Kotagiri@...rochip.com>, <Manohar.Puri@...rochip.com>
Subject: [PATCH] spi: atmel,quadspi: Define lan966x QSPI
LAN966x SoC supports 3 QSPI controllers. Each of them support
data and clock frequency upto 100Mhz DDR and QUAD protocol.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
---
Documentation/devicetree/bindings/spi/atmel,quadspi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
index 1d493add4053..100d6e7f2748 100644
--- a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
+++ b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
@@ -19,6 +19,7 @@ properties:
- microchip,sam9x60-qspi
- microchip,sama7g5-qspi
- microchip,sama7g5-ospi
+ - microchip,lan966x-qspi
reg:
items:
--
2.17.1
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