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Date: Fri, 8 Apr 2022 03:14:13 +0000
From: Hongxing Zhu <hongxing.zhu@....com>
To: "tharvey@...eworks.com" <tharvey@...eworks.com>,
Lucas Stach <l.stach@...gutronix.de>,
Alexander Stein <alexander.stein@...tq-group.com>
CC: Philipp Zabel <p.zabel@...gutronix.de>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Rob Herring <robh@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Vinod Koul <vkoul@...nel.org>,
Alexander Stein <alexander.stein@...tq-group.com>,
"linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
Device Tree Mailing List <devicetree@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
Linux ARM Mailing List <linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>,
Sascha Hauer <kernel@...gutronix.de>,
dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH v2 0/7] Add the iMX8MP PCIe support
> -----Original Message-----
> From: Tim Harvey <tharvey@...eworks.com>
> Sent: 2022年4月8日 4:42
> To: Hongxing Zhu <hongxing.zhu@....com>; Lucas Stach
> <l.stach@...gutronix.de>
> Cc: Philipp Zabel <p.zabel@...gutronix.de>; bhelgaas@...gle.com; Lorenzo
> Pieralisi <lorenzo.pieralisi@....com>; Rob Herring <robh@...nel.org>; Shawn
> Guo <shawnguo@...nel.org>; Vinod Koul <vkoul@...nel.org>; Alexander Stein
> <alexander.stein@...tq-group.com>; linux-phy@...ts.infradead.org; Device
> Tree Mailing List <devicetree@...r.kernel.org>; linux-pci@...r.kernel.org;
> Linux ARM Mailing List <linux-arm-kernel@...ts.infradead.org>; open list
> <linux-kernel@...r.kernel.org>; Sascha Hauer <kernel@...gutronix.de>;
> dl-linux-imx <linux-imx@....com>
> Subject: Re: [PATCH v2 0/7] Add the iMX8MP PCIe support
>
> On Mon, Mar 7, 2022 at 1:18 AM Richard Zhu <hongxing.zhu@....com>
> wrote:
> >
> > Based on the i.MX8MP GPC and blk-ctrl patch-set[1] issued by Lucas and
> > the following commits.
> > - one codes refine patch-set[5].
> > - two Fixes[2],[3].
> > - one binding commit[4].
> > - some dts changes in Shawn's git if you want to test PCIe on i.MX8MM
> EVK.
> > b4d36c10bf17 arm64: dts: imx8mm-evk: Add the pcie support on
> imx8mm evk board
> > aaeba6a8e226 arm64: dts: imx8mm: Add the pcie support
> > cfc5078432ca arm64: dts: imx8mm: Add the pcie phy support
> >
> > Sorry about that there may be some conflictions when do the codes merge.
> > I'm waiting for the ack now, and will re-base them in a proper sequence later.
> >
> > This series patches add the i.MX8MP PCIe support and tested on i.MX8MM
> > EVK and i.MX8MP EVk boards. The PCIe NVME works fine on both boards.
> >
> > - i.MX8MP PCIe PHY has two resets refer to the i.MX8MM PCIe PHY.
> > Add one more PHY reset for i.MX8MP PCIe PHY accordingly.
> > - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
> > And share as much as possible codes with i.MX8MM PCIe PHY.
> > - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
> > driver.
> >
> > Main changes v1-->v2:
> > - It's my fault forget including Vinod, re-send v2 after include Vinod
> > and linux-phy@...ts.infradead.org.
> > - List the basements of this patch-set. The branch, codes changes and so on.
> > - Clean up some useless register and bit definitions in #3 patch.
> >
> > [1]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F2022022820
> 1
> >
> 731.3330192-1-l.stach%40pengutronix.de%2F&data=04%7C01%7Chongx
> ing.
> >
> zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> 2b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &sdata=namjBp1ZpawS9s25%2FwS8aOnd2A7rHTK2rQRwG4V0Dt8%3D&
> amp;reserv
> > ed=0
> > [2]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646289275-17813-
> 1
> >
> -git-send-email-hongxing.zhu%40nxp.com%2F&data=04%7C01%7Chongxi
> ng.
> >
> zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> 2b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &sdata=dWr1ui7eIc92iWzvo8VKPXTkNel3NR9yNxD5CyHIuV0%3D&r
> eserved
> > =0
> > [3]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1645672013-8949-1
> -
> >
> git-send-email-hongxing.zhu%40nxp.com%2F&data=04%7C01%7Chongxi
> ng.z
> >
> hu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc2
> b4c6fa92c
> >
> d99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWFp
> bGZsb3d8eyJW
> >
> IjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3
> 000&
> >
> amp;sdata=FCis4KE9KZqS8Ou6I0KTQu%2FayWSm%2Ftj%2Bcrd68EThsNs%3D
> &res
> > erved=0
> > [4]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646293805-18248-
> 1
> >
> -git-send-email-hongxing.zhu%40nxp.com%2F&data=04%7C01%7Chongxi
> ng.
> >
> zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> 2b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &sdata=sbYuLpfBFUImVi7YLe%2FCYvQNxleK2tnHKfr%2FByoAJsA%3D&am
> p;rese
> > rved=0
> > [5]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fcover%2F1645760667-10510-
> 1
> >
> -git-send-email-hongxing.zhu%40nxp.com%2F&data=04%7C01%7Chongxi
> ng.
> >
> zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> 2b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &sdata=tRZQBUN4CleGFFbxqNn4W1kUwCgATERggfa8qEQyc9E%3D&am
> p;reserved
> > =0
> >
> > NOTE:
> > Based git
> > <git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git>
> > Based branch <pci/imx6>
> >
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
> > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml | 4 +-
> > arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 55
> ++++++++++++++++++++++
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 46
> ++++++++++++++++++-
> > drivers/pci/controller/dwc/pci-imx6.c | 19
> +++++++-
> > drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 205
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> ++++-----------------
> > drivers/reset/reset-imx7.c | 1 +
> > 7 files changed, 286 insertions(+), 45 deletions(-)
> >
> > [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support
> > [PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding [PATCH v2
> > 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY [PATCH v2 4/7]
> > dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible [PATCH v2 5/7]
> > arm64: dts: imx8mp: add the iMX8MP PCIe support [PATCH v2 6/7] arm64:
> > dts: imx8mp-evk: Add PCIe support [PATCH v2 7/7] PCI: imx6: Add the
> > iMX8MP PCIe support
> >
>
> Richard,
>
> Thanks for working on this!
>
> Do you plan on submitting another version soon? I've tried to test this with an
> imx8mp board I'm bringing up and while the host controller enumerates I fail
> to get a link to a device. It's very likely I am missing something as this series
> depends on the IMX8MP blk-ctrl and gpc series which I also can't cleanly apply.
> Lucas just submitted a 'consolidated i.MX8MP HSIO/MEDIA/HDMI blk-ctrl
> series' [1] yet I can't find a repo/branch that applies to either.
>
> Perhaps you have a git repo somewhere I can look at while we wait for
> imx8mp blk-ctl/gpc to settle and you to submit a v3?
Hi Tim:
Thanks for your kindly help to do the tests.
I had listed the dependencies in the cover-letter log.
Alexander and I used to test this series commits based on the V5.17 kernel.
Lucas had provided some review comments and suggestions about the PLL bits
manipulations of HSIOMIX in i.MX8MP PCIe PHY driver #3 of this series.
And he suggested to let the HSIOMIX blk-ctrl make this PLL as a real clock,
and used by i.MX8MP PCIe PHY driver later.
Although I have some confusions, it's better let's wating for the blk-ctrl
settle down and get clear discussion with Lucas later.
How do you think about that?
Best Regards
Richard Zhu
>
> Best Regards,
>
> Tim
> [1]
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchw
> ork.kernel.org%2Fproject%2Flinux-arm-kernel%2Flist%2F%3Fseries%3D62958
> 6&data=04%7C01%7Chongxing.zhu%40nxp.com%7C19e85ae119bc47d3
> 397e08da18d71007%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7
> C637849609225124527%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAw
> MDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sda
> ta=SUCCWtnCtTSCONfSoixOPgpMO4dnsBTW20x9qRdw4Fw%3D&reserve
> d=0
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