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Message-ID: <20220408033357.GF2864606@ls.amr.corp.intel.com>
Date: Thu, 7 Apr 2022 20:33:57 -0700
From: Isaku Yamahata <isaku.yamahata@...il.com>
To: Kai Huang <kai.huang@...el.com>
Cc: Xiaoyao Li <xiaoyao.li@...el.com>,
Paolo Bonzini <pbonzini@...hat.com>, isaku.yamahata@...el.com,
kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
isaku.yamahata@...il.com, Jim Mattson <jmattson@...gle.com>,
erdemaktas@...gle.com, Connor Kuehl <ckuehl@...hat.com>,
Sean Christopherson <seanjc@...gle.com>
Subject: Re: [RFC PATCH v5 027/104] KVM: TDX: initialize VM with TDX specific
parameters
On Thu, Apr 07, 2022 at 01:51:38PM +1200,
Kai Huang <kai.huang@...el.com> wrote:
> On Thu, 2022-04-07 at 09:29 +0800, Xiaoyao Li wrote:
> > On 4/5/2022 8:58 PM, Paolo Bonzini wrote:
> > > On 3/4/22 20:48, isaku.yamahata@...el.com wrote:
> > > > + td_params->attributes = init_vm->attributes;
> > > > + if (td_params->attributes & TDX_TD_ATTRIBUTE_PERFMON) {
> > > > + pr_warn("TD doesn't support perfmon. KVM needs to save/restore "
> > > > + "host perf registers properly.\n");
> > > > + return -EOPNOTSUPP;
> > > > + }
> > >
> > > Why does KVM have to hardcode this (and LBR/AMX below)? Is the level of
> > > hardware support available from tdx_caps, for example through the CPUID
> > > configs (0xA for this one, 0xD for LBR and AMX)?
> >
> > It's wrong code. PMU is allowed.
> >
> > AMX and LBR are disallowed because and the time we wrote the codes they
> > are not supported by KVM. Now AMX should be allowed, but (arch-)LBR
> > should be still blocked until KVM merges arch-LBR support.
>
> I think Isaku's idea is we don't support them in the first submission?
>
> If so as I suggested, we should add a TODO in comment..
Sure, will add a TODO comment.
--
Isaku Yamahata <isaku.yamahata@...il.com>
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