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Date: Fri, 8 Apr 2022 09:28:05 +0800
From: CK Hu <ck.hu@...iatek.com>
To: Jason-JH Lin <jason-jh.lin@...iatek.com>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
"Chun-Kuang Hu" <chunkuang.hu@...nel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
CC: David Airlie <airlied@...ux.ie>, <singo.chang@...iatek.com>,
"Alexandre Torgue" <alexandre.torgue@...s.st.com>,
<postmaster@...r.kernel.org>,
"Fabien Parent" <fparent@...libre.com>,
John 'Warthog9' Hawley <warthog9@...lescrag.net>,
<linux-stm32@...md-mailman.stormreply.com>,
<roy-cw.yeh@...iatek.com>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
<devicetree@...r.kernel.org>, Daniel Vetter <daniel@...ll.ch>,
<nancy.lin@...iatek.com>, <linux-mediatek@...ts.infradead.org>,
<hsinyi@...omium.org>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <moudy.ho@...iatek.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>
Subject: Re: [RESEND v17 3/7] soc: mediatek: add mtk-mmsys support for
mt8195 vdosys0
Hi, Jason:
On Thu, 2022-04-07 at 14:27 +0800, Jason-JH Lin wrote:
> Hi CK,
>
> Thanks for the reviews.
>
> On Thu, 2022-04-07 at 13:45 +0800, CK Hu wrote:
> > Hi, Jason:
> >
> > On Thu, 2022-04-07 at 11:04 +0800, jason-jh.lin wrote:
> > > 1. Add mt8195 mmsys compatible for vdosys0.
> > > 2. Add mt8195 routing table settings and fix build fail.
> > > 3. Add clock name, clock driver name and routing table into the
> > > driver data
> > > of mt8195 vdosys0.
> > > 4. Add get match data by clock name function and clock platform
> > > labels
> > > to identify which mmsys node is corresponding to vdosys0.
> > >
> > > Signed-off-by: jason-jh.lin <jason-jh.lin@...iatek.com>
> > > ---
> > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
> > > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 6 +-
> > > drivers/soc/mediatek/mt8167-mmsys.h | 2 +-
> > > drivers/soc/mediatek/mt8183-mmsys.h | 2 +-
> > > drivers/soc/mediatek/mt8186-mmsys.h | 4 +-
> > > drivers/soc/mediatek/mt8192-mmsys.h | 4 +-
> > > drivers/soc/mediatek/mt8195-mmsys.h | 370
> > > ++++++++++++++++++++
> > > drivers/soc/mediatek/mt8365-mmsys.h | 4 +-
> > > drivers/soc/mediatek/mtk-mmsys.c | 62 ++++
> > > drivers/soc/mediatek/mtk-mmsys.h | 1 +
> > > drivers/soc/mediatek/mtk-mutex.c | 8 +-
> > > include/linux/soc/mediatek/mtk-mmsys.h | 13 +-
> > > 12 files changed, 461 insertions(+), 17 deletions(-)
> > > create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h
> > >
> >
> > [snip]
> >
> > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c
> > > b/drivers/soc/mediatek/mtk-mmsys.c
> > > index 4fc4c2c9ea20..b2fa239c5f5f 100644
> > > --- a/drivers/soc/mediatek/mtk-mmsys.c
> > > +++ b/drivers/soc/mediatek/mtk-mmsys.c
> > > @@ -4,6 +4,8 @@
> > > * Author: James Liao <jamesjj.liao@...iatek.com>
> > > */
> > >
> > > +#include <linux/clk.h>
> > > +#include <linux/clk-provider.h>
> > > #include <linux/delay.h>
> > > #include <linux/device.h>
> > > #include <linux/io.h>
> > > @@ -17,6 +19,7 @@
> > > #include "mt8183-mmsys.h"
> > > #include "mt8186-mmsys.h"
> > > #include "mt8192-mmsys.h"
> > > +#include "mt8195-mmsys.h"
> > > #include "mt8365-mmsys.h"
> > >
> > > static const struct mtk_mmsys_driver_data
> > > mt2701_mmsys_driver_data
> > > =
> > > {
> > > @@ -72,12 +75,24 @@ static const struct mtk_mmsys_driver_data
> > > mt8192_mmsys_driver_data = {
> > > .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table),
> > > };
> > >
> > > +static const struct mtk_mmsys_driver_data
> > > mt8195_vdosys0_driver_data
> > > = {
> > > + .clk_name = "cfg_vdo0",
> > > + .clk_driver = "clk-mt8195-vdo0",
> > > + .routes = mmsys_mt8195_routing_table,
> > > + .num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table),
> > > +};
> > > +
> > > static const struct mtk_mmsys_driver_data
> > > mt8365_mmsys_driver_data
> > > =
> > > {
> > > .clk_driver = "clk-mt8365-mm",
> > > .routes = mt8365_mmsys_routing_table,
> > > .num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table),
> > > };
> > >
> > > +static const struct of_device_id mtk_clk_platform_labels[] = {
> > > + { .compatible = "mediatek,mt8195-mmsys",
> > > + .data = (void *)"clk-mt8195"},
> > > +};
> > > +
> > > struct mtk_mmsys {
> > > void __iomem *regs;
> > > const struct mtk_mmsys_driver_data *data;
> > > @@ -85,6 +100,45 @@ struct mtk_mmsys {
> > > struct reset_controller_dev rcdev;
> > > };
> > >
> > > +static int mtk_mmsys_get_match_data_by_clk_name(const struct
> > > mtk_mmsys_driver_data **data,
> > > + struct device *dev)
> > > +{
> > > + int i;
> > > + struct clk *clk;
> > > + const char *clk_name;
> > > + const struct of_device_id *of_id =
> > > of_match_node(mtk_clk_platform_labels,
> > > + dev->of_node);
> > > + const struct mtk_mmsys_driver_data *drvdata[] = {
> > > + &mt8195_vdosys0_driver_data,
> > > + };
> > > +
> > > + if (!of_id || !of_id->data) {
> > > + dev_err(dev, "Can't find match clk platform labels\n");
> > > + return -EINVAL;
> > > + }
> > > +
> > > + clk = devm_clk_get(dev, NULL);
> > > + if (IS_ERR(clk)) {
> > > + dev_err(dev, "failed to get mmsys clk\n");
> > > + return PTR_ERR(clk);
> > > + }
> > > +
> > > + clk_name = __clk_get_name(clk);
> > > + if (!clk_name) {
> > > + dev_err(dev, "invalid mmsys clk name\n");
> > > + return -EINVAL;
> > > + }
> > > +
> > > + for (i = 0; i < ARRAY_SIZE(drvdata); i++)
> > > + if (strncmp(drvdata[i]->clk_name, clk_name,
> > > strlen(clk_name)) == 0 &&
> > > + strncmp(drvdata[i]->clk_driver, of_id->data,
> > > strlen(of_id->data)) == 0) {
> >
> > I think clk_name is enough to identify the mmsys, why do you need
> > clk_driver?
>
> I think there might be another chip that needs to get driver data by
> clk_name .
> So I use "clk-mt8195" in clk_driver to identify the corresponding
> platform whose clk_name of mmsys is also "cfg_vod0".
We usually don't care the future because the future may not happen. If
it's sure that would happen, I think clk_driver is not a good choice.
For now, the clk_driver name is different for each SoC, but it could be
the same for each SoC because only one clock driver would be compiled.
I think "compatible" would be different for each SoC.
Regards,
CK
>
> > > + *data = drvdata[i];
> > > + return 0;
> > > + }
> > > +
> > > + return -EINVAL;
> > > +}
> > > +
> > > void mtk_mmsys_ddp_connect(struct device *dev,
> > > enum mtk_ddp_comp_id cur,
> > > enum mtk_ddp_comp_id next)
> > > @@ -206,6 +260,11 @@ static int mtk_mmsys_probe(struct
> > > platform_device *pdev)
> > > }
> > >
> > > mmsys->data = of_device_get_match_data(&pdev->dev);
> > > + if (!mmsys->data &&
> > > mtk_mmsys_get_match_data_by_clk_name(&mmsys->data, dev) < 0) {
> > > + dev_err(dev, "Couldn't get match driver data\n");
> > > + return -EINVAL;
> > > + }
> > > +
> > > platform_set_drvdata(pdev, mmsys);
> > >
> > > clks = platform_device_register_data(&pdev->dev, mmsys->data-
> > > > clk_driver,
> > >
> > > @@ -260,6 +319,9 @@ static const struct of_device_id
> > > of_match_mtk_mmsys[] = {
> > > .compatible = "mediatek,mt8192-mmsys",
> > > .data = &mt8192_mmsys_driver_data,
> > > },
> > > + {
> > > + .compatible = "mediatek,mt8195-mmsys",
> > > + },
> > > {
> > > .compatible = "mediatek,mt8365-mmsys",
> > > .data = &mt8365_mmsys_driver_data,
> > >
> >
> > [snip]
> >
> > > b/include/linux/soc/mediatek/mtk-mmsys.h
> > > index 4bba275e235a..fb719fd1281c 100644
> > > --- a/include/linux/soc/mediatek/mtk-mmsys.h
> > > +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> > > @@ -16,14 +16,25 @@ enum mtk_ddp_comp_id {
> > > DDP_COMPONENT_CCORR,
> > > DDP_COMPONENT_COLOR0,
> > > DDP_COMPONENT_COLOR1,
> > > - DDP_COMPONENT_DITHER,
> > > + DDP_COMPONENT_DITHER0,
> >
> > I would like soc and drm modification to go through different tree,
> > so
> > this setting would not modify drm driver in this patch.
> >
> > DDP_COMPONENT_DITHER0 = DDP_COMPONENT_DITHER,
> >
> > Then modify drm driver after this patch.
> >
> > Regards,
> > CK
>
> OK, I will use this modification at the next version.
> Thanks!
>
> Regards,
> Jason-JH.Lin
>
> >
> > > + DDP_COMPONENT_DITHER1,
> > > + DDP_COMPONENT_DP_INTF0,
> > > + DDP_COMPONENT_DP_INTF1,
> > > DDP_COMPONENT_DPI0,
> > > DDP_COMPONENT_DPI1,
> > > + DDP_COMPONENT_DSC0,
> > > + DDP_COMPONENT_DSC1,
> > > DDP_COMPONENT_DSI0,
> > > DDP_COMPONENT_DSI1,
> > > DDP_COMPONENT_DSI2,
> > > DDP_COMPONENT_DSI3,
> > > DDP_COMPONENT_GAMMA,
> > > + DDP_COMPONENT_MERGE0,
> > > + DDP_COMPONENT_MERGE1,
> > > + DDP_COMPONENT_MERGE2,
> > > + DDP_COMPONENT_MERGE3,
> > > + DDP_COMPONENT_MERGE4,
> > > + DDP_COMPONENT_MERGE5,
> > > DDP_COMPONENT_OD0,
> > > DDP_COMPONENT_OD1,
> > > DDP_COMPONENT_OVL0,
> >
> >
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