linux-kernel - Re: [RFC PATCH v5 092/104] KVM: TDX: Handle TDX PV HLT hypercall

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Date:   Fri, 8 Apr 2022 14:51:39 +0000
From:   Sean Christopherson <seanjc@...gle.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     Isaku Yamahata <isaku.yamahata@...il.com>,
        isaku.yamahata@...el.com, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Jim Mattson <jmattson@...gle.com>,
        erdemaktas@...gle.com, Connor Kuehl <ckuehl@...hat.com>
Subject: Re: [RFC PATCH v5 092/104] KVM: TDX: Handle TDX PV HLT hypercall

On Fri, Apr 08, 2022, Paolo Bonzini wrote:
> On 4/8/22 06:58, Isaku Yamahata wrote:
> > On Thu, Apr 07, 2022 at 05:56:05PM +0200,
> > Paolo Bonzini <pbonzini@...hat.com> wrote:
> > 
> > > You didn't answer the other question, which is "Where is R12 documented for
> > > TDG.VP.VMCALL<Instruction.HLT>?" though...  Should I be worried? :)
> > 
> > It's publicly documented.
> > 
> > Guest-Host-Communication Interface(GHCI) spec, 344426-003US Feburary 2022.
> > 3.8 TDG.VP.VMCALL<Instruction.HLT>
> > R12 Interrupt Blocked Flag.
> >      The TD is expected to clear this flag iff RFLAGS.IF == 1 or the TDCALL instruction
> >      (that invoked TDG.VP.TDVMCALL(Instruction.HLT)) immediately follows an STI
> >      instruction, otherwise this flag should be set.
> 
> Oh, Google doesn't know about this version of the spec...  It can be
> downloaded from https://www.intel.com/content/www/us/en/developer/articles/technical/intel-trust-domain-extensions.html
> though.
> 
> I also found VCPU_STATE_DETAILS in https://www.intel.com/content/dam/develop/external/us/en/documents/tdx-module-1.0-public-spec-v0.931.pdf:
> 
>   Bit 0: VMXIP, indicates that a virtual interrupt is pending
>   delivery, i.e. VMCS.RVI[7:4] > TDVPS.VAPIC.VPPR[7:4]
> 
> It also documents how it has to be used.  So this looks more or less okay,
> just rename "vmxip" to "interrupt_pending_delivery".

If we're keeping the call back into SEAM, then this belongs in the path of
apic_has_interrupt_for_ppr(), not in the HLT-exit path.  To avoid multiple SEAMCALLS
in a single exit, VCPU_EXREG_RVI can be added.