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Date: Sat, 09 Apr 2022 04:17:35 +0000
From: Yassine Oudjana <y.oudjana@...tonmail.com>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Ilia Lin <ilia.lin@...nel.org>,
Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
"Rafael J. Wysocki" <rafael@...nel.org>
Cc: Yassine Oudjana <y.oudjana@...tonmail.com>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Loic Poulain <loic.poulain@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-pm@...r.kernel.org
Subject: [PATCH v2 5/9] dt-bindings: opp: opp-v2-kryo-cpu: Remove SMEM
qcom-cpufreq-nvmem no longer uses SMEM. Remove all references
to SMEM and change the description and maximum value of
opp-supported-hw to reflect the new set of possible values.
Signed-off-by: Yassine Oudjana <y.oudjana@...tonmail.com>
---
.../bindings/opp/opp-v2-kryo-cpu.yaml | 56 +++++++++----------
1 file changed, 26 insertions(+), 30 deletions(-)
diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
index 8c2e9ac5f68d..30f7b596d609 100644
--- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
+++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
@@ -17,10 +17,10 @@ description: |
the CPU frequencies subset and voltage value of each OPP varies based on
the silicon variant in use.
Qualcomm Technologies, Inc. Process Voltage Scaling Tables
- defines the voltage and frequency value based on the msm-id in SMEM
- and speedbin blown in the efuse combination.
- The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
- to provide the OPP framework with required information (existing HW bitmap).
+ defines the voltage and frequency value based on the speedbin blown in
+ the efuse combination.
+ The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
+ the OPP framework with required information (existing HW bitmap).
This is used to determine the voltage and frequency value for each OPP of
operating-points-v2 table when it is parsed by the OPP framework.
@@ -50,15 +50,11 @@ patternProperties:
description: |
A single 32 bit bitmap value, representing compatible HW.
Bitmap:
- 0: MSM8996 V3, speedbin 0
- 1: MSM8996 V3, speedbin 1
- 2: MSM8996 V3, speedbin 2
- 3: unused
- 4: MSM8996 SG, speedbin 0
- 5: MSM8996 SG, speedbin 1
- 6: MSM8996 SG, speedbin 2
- 7-31: unused
- maximum: 0x77
+ 0: MSM8996, speedbin 0
+ 1: MSM8996, speedbin 1
+ 2: MSM8996, speedbin 2
+ 3-31: unused
+ maximum: 0x7
clock-latency-ns: true
@@ -184,19 +180,19 @@ examples:
opp-307200000 {
opp-hz = /bits/ 64 <307200000>;
opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1593600000 {
- opp-hz = /bits/ 64 <1593600000>;
+ opp-1401600000 {
+ opp-hz = /bits/ 64 <1401600000>;
opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x71>;
+ opp-supported-hw = <0x5>;
clock-latency-ns = <200000>;
};
- opp-2188800000 {
- opp-hz = /bits/ 64 <2188800000>;
+ opp-1593600000 {
+ opp-hz = /bits/ 64 <1593600000>;
opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x10>;
+ opp-supported-hw = <0x1>;
clock-latency-ns = <200000>;
};
};
@@ -209,25 +205,25 @@ examples:
opp-307200000 {
opp-hz = /bits/ 64 <307200000>;
opp-microvolt = <905000 905000 1140000>;
- opp-supported-hw = <0x77>;
+ opp-supported-hw = <0x7>;
clock-latency-ns = <200000>;
};
- opp-1593600000 {
- opp-hz = /bits/ 64 <1593600000>;
+ opp-1804800000 {
+ opp-hz = /bits/ 64 <1804800000>;
opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x70>;
+ opp-supported-hw = <0x6>;
clock-latency-ns = <200000>;
};
- opp-2150400000 {
- opp-hz = /bits/ 64 <2150400000>;
+ opp-1900800000 {
+ opp-hz = /bits/ 64 <1900800000>;
opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x31>;
+ opp-supported-hw = <0x4>;
clock-latency-ns = <200000>;
};
- opp-2342400000 {
- opp-hz = /bits/ 64 <2342400000>;
+ opp-2150400000 {
+ opp-hz = /bits/ 64 <2150400000>;
opp-microvolt = <1140000 905000 1140000>;
- opp-supported-hw = <0x10>;
+ opp-supported-hw = <0x1>;
clock-latency-ns = <200000>;
};
};
--
2.35.1
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