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Message-Id: <20220409120819.3124209-5-gch981213@gmail.com>
Date: Sat, 9 Apr 2022 20:08:18 +0800
From: Chuanhong Guo <gch981213@...il.com>
To: linux-spi@...r.kernel.org
Cc: Chuanhong Guo <gch981213@...il.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Roger Quadros <rogerq@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Cai Huoqing <cai.huoqing@...ux.dev>,
Florian Fainelli <f.fainelli@...il.com>,
Colin Ian King <colin.king@...el.com>,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
Paul Cercueil <paul@...pouillou.net>,
Pratyush Yadav <p.yadav@...com>, Yu Kuai <yukuai3@...wei.com>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS),
linux-arm-kernel@...ts.infradead.org (moderated list:ARM/Mediatek SoC
support),
linux-mediatek@...ts.infradead.org (moderated list:ARM/Mediatek SoC
support), linux-kernel@...r.kernel.org (open list),
linux-mtd@...ts.infradead.org (open list:NAND FLASH SUBSYSTEM)
Subject: [PATCH v5 4/5] spi: dt-bindings: add binding doc for spi-mtk-snfi
Add device-tree binding documentation for Mediatek SPI-NAND Flash
Interface.
Signed-off-by: Chuanhong Guo <gch981213@...il.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
Changes since v1:
1. add a blank line between properties in dt binding doc
2. rename ecc-engine to nand-ecc-engine for the generic properties
Change since v2: none
Change since v3: fix a missing rename in v1
Change since v4: fix typo: piplined -> pipelined
.../bindings/spi/mediatek,spi-mtk-snfi.yaml | 88 +++++++++++++++++++
1 file changed, 88 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml
diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml
new file mode 100644
index 000000000000..6e6e02c91780
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SPI-NAND flash controller for MediaTek ARM SoCs
+
+maintainers:
+ - Chuanhong Guo <gch981213@...il.com>
+
+description: |
+ The Mediatek SPI-NAND flash controller is an extended version of
+ the Mediatek NAND flash controller. It can perform standard SPI
+ instructions with one continuous write and one read for up-to 0xa0
+ bytes. It also supports typical SPI-NAND page cache operations
+ in single, dual or quad IO mode with pipelined ECC encoding/decoding
+ using the accompanying ECC engine. There should be only one spi
+ slave device following generic spi bindings.
+
+allOf:
+ - $ref: /schemas/spi/spi-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt7622-snand
+ - mediatek,mt7629-snand
+
+ reg:
+ items:
+ - description: core registers
+
+ interrupts:
+ items:
+ - description: NFI interrupt
+
+ clocks:
+ items:
+ - description: clock used for the controller
+ - description: clock used for the SPI bus
+
+ clock-names:
+ items:
+ - const: nfi_clk
+ - const: pad_clk
+
+ nand-ecc-engine:
+ description: device-tree node of the accompanying ECC engine.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - nand-ecc-engine
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/mt7622-clk.h>
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ snfi: spi@...0d000 {
+ compatible = "mediatek,mt7622-snand";
+ reg = <0 0x1100d000 0 0x1000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_NFI_PD>, <&pericfg CLK_PERI_SNFI_PD>;
+ clock-names = "nfi_clk", "pad_clk";
+ nand-ecc-engine = <&bch>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ nand-ecc-engine = <&snfi>;
+ };
+ };
+ };
--
2.35.1
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