linux-kernel - [PATCH 1/1 FYI] tools headers arm64: Sync arm64's cputype.h with the kernel sources

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Message-ID: <YlGdr2pha0creLPo@kernel.org>
Date:   Sat, 9 Apr 2022 11:52:31 -0300
From:   Arnaldo Carvalho de Melo <acme@...nel.org>
To:     Ali Saidi <alisaidi@...zon.com>,
        Chanho Park <chanho61.park@...sung.com>,
        Will Deacon <will@...nel.org>
Cc:     Andrew Kilroy <andrew.kilroy@....com>,
        German Gomez <german.gomez@....com>,
        James Clark <james.clark@....com>,
        John Garry <john.garry@...wei.com>,
        Leo Yan <leo.yan@...aro.org>, linux-kernel@...r.kernel.org
Subject: [PATCH 1/1 FYI] tools headers arm64: Sync arm64's cputype.h with the
 kernel sources

Just FYI, I'm carrying this on the perf tools tree.

- Arnaldo

---

To get the changes in:

  83bea32ac7ed37bb ("arm64: Add part number for Arm Cortex-A78AE")

That addresses this perf build warning:

  Warning: Kernel ABI header at 'tools/arch/arm64/include/asm/cputype.h' differs from latest version at 'arch/arm64/include/asm/cputype.h'
  diff -u tools/arch/arm64/include/asm/cputype.h arch/arm64/include/asm/cputype.h

Cc: Ali Saidi <alisaidi@...zon.com>
Cc: Andrew Kilroy <andrew.kilroy@....com>
Cc: Chanho Park <chanho61.park@...sung.com>
Cc: German Gomez <german.gomez@....com>
Cc: James Clark <james.clark@....com>
Cc: John Garry <john.garry@...wei.com>
Cc: Leo Yan <leo.yan@...aro.org>
Cc: Will Deacon <will@...nel.org>
Link: http://lore.kernel.org/lkml/
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
---
 tools/arch/arm64/include/asm/cputype.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/arch/arm64/include/asm/cputype.h b/tools/arch/arm64/include/asm/cputype.h
index 9afcc6467a095c35..e09d6908a21d36b1 100644
--- a/tools/arch/arm64/include/asm/cputype.h
+++ b/tools/arch/arm64/include/asm/cputype.h
@@ -75,6 +75,7 @@
 #define ARM_CPU_PART_CORTEX_A77		0xD0D
 #define ARM_CPU_PART_NEOVERSE_V1	0xD40
 #define ARM_CPU_PART_CORTEX_A78		0xD41
+#define ARM_CPU_PART_CORTEX_A78AE	0xD42
 #define ARM_CPU_PART_CORTEX_X1		0xD44
 #define ARM_CPU_PART_CORTEX_A510	0xD46
 #define ARM_CPU_PART_CORTEX_A710	0xD47
@@ -130,6 +131,7 @@
 #define MIDR_CORTEX_A77	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
 #define MIDR_NEOVERSE_V1	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1)
 #define MIDR_CORTEX_A78	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)
+#define MIDR_CORTEX_A78AE	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)
 #define MIDR_CORTEX_X1	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1)
 #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
 #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
-- 
2.35.1