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Message-ID: <YlGgro3TupbOEnJC@kernel.org>
Date: Sat, 9 Apr 2022 12:05:18 -0300
From: Arnaldo Carvalho de Melo <acme@...nel.org>
To: Eric Lin <eric.lin@...ive.com>
Cc: peterz@...radead.org, mingo@...hat.com, mark.rutland@....com,
alexander.shishkin@...ux.intel.com, jolsa@...nel.org,
namhyung@...nel.org, palmer@...belt.com, aou@...s.berkeley.edu,
iii@...ux.ibm.com, linux-perf-users@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
paul.walmsley@...ive.com, greentime.hu@...ive.com
Subject: Re: [PATCH 1/1] perf jitdump: Add riscv64 support.
Em Wed, Apr 06, 2022 at 10:26:06PM +0800, Eric Lin escreveu:
> Signed-off-by: Eric Lin <eric.lin@...ive.com>
Can you plese provide some series of commands demonstrating the usage of
this functionality on riscv?
A dump, for instance.
- Arnaldo
> ---
> tools/perf/arch/riscv/Makefile | 1 +
> tools/perf/util/genelf.h | 3 +++
> 2 files changed, 4 insertions(+)
>
> diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
> index 1aa9dd772489..a8d25d005207 100644
> --- a/tools/perf/arch/riscv/Makefile
> +++ b/tools/perf/arch/riscv/Makefile
> @@ -2,3 +2,4 @@ ifndef NO_DWARF
> PERF_HAVE_DWARF_REGS := 1
> endif
> PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
> +PERF_HAVE_JITDUMP := 1
> diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
> index 3db3293213a9..ae138afe6c56 100644
> --- a/tools/perf/util/genelf.h
> +++ b/tools/perf/util/genelf.h
> @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
> #elif defined(__s390x__)
> #define GEN_ELF_ARCH EM_S390
> #define GEN_ELF_CLASS ELFCLASS64
> +#elif defined(__riscv) && __riscv_xlen == 64
> +#define GEN_ELF_ARCH EM_RISCV
> +#define GEN_ELF_CLASS ELFCLASS64
> #else
> #error "unsupported architecture"
> #endif
> --
> 2.35.1
--
- Arnaldo
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