linux-kernel - Re: [PATCH 3/6] arm64: dts: ls2080a-rdb: add phy nodes

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Message-ID: <20220410011244.GH129381@dragon>
Date:   Sun, 10 Apr 2022 09:12:44 +0800
From:   Shawn Guo <shawnguo@...nel.org>
To:     Li Yang <leoyang.li@....com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/6] arm64: dts: ls2080a-rdb: add phy nodes

On Thu, Mar 17, 2022 at 02:01:06PM -0500, Li Yang wrote:
> Define PHY nodes on the board.
> 
> Signed-off-by: Li Yang <leoyang.li@....com>
> ---
>  .../boot/dts/freescale/fsl-ls2080a-rdb.dts    | 68 +++++++++++++++++++
>  1 file changed, 68 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
> index 44894356059c..1c8c99a74071 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
> @@ -23,3 +23,71 @@ chosen {
>  		stdout-path = "serial1:115200n8";
>  	};
>  };
> +
> +&dpmac5 {
> +	phy-handle = <&mdio2_phy1>;
> +	phy-connection-type = "10gbase-r";
> +};
> +
> +&dpmac6 {
> +	phy-handle = <&mdio2_phy2>;
> +	phy-connection-type = "10gbase-r";
> +};
> +
> +&dpmac7 {
> +	phy-handle = <&mdio2_phy3>;
> +	phy-connection-type = "10gbase-r";
> +};
> +
> +&dpmac8 {
> +	phy-handle = <&mdio2_phy4>;
> +	phy-connection-type = "10gbase-r";
> +};
> +
> +&emdio1 {
> +	status = "disabled";
> +
> +	/* CS4340 PHYs */
> +	mdio1_phy1: emdio1_phy@1 {

We prefer hyphen rather than underscore in node name.

Shawn

> +		reg = <0x10>;
> +	};
> +
> +	mdio1_phy2: emdio1_phy@2 {
> +		reg = <0x11>;
> +	};
> +
> +	mdio1_phy3: emdio1_phy@3 {
> +		reg = <0x12>;
> +	};
> +
> +	mdio1_phy4: emdio1_phy@4 {
> +		reg = <0x13>;
> +	};
> +};
> +
> +&emdio2 {
> +	/* AQR405 PHYs */
> +	mdio2_phy1: emdio2_phy@1 {
> +		compatible = "ethernet-phy-ieee802.3-c45";
> +		interrupts = <0 1 0x4>; /* Level high type */
> +		reg = <0x0>;
> +	};
> +
> +	mdio2_phy2: emdio2_phy@2 {
> +		compatible = "ethernet-phy-ieee802.3-c45";
> +		interrupts = <0 2 0x4>; /* Level high type */
> +		reg = <0x1>;
> +	};
> +
> +	mdio2_phy3: emdio2_phy@3 {
> +		compatible = "ethernet-phy-ieee802.3-c45";
> +		interrupts = <0 4 0x4>; /* Level high type */
> +		reg = <0x2>;
> +	};
> +
> +	mdio2_phy4: emdio2_phy@4 {
> +		compatible = "ethernet-phy-ieee802.3-c45";
> +		interrupts = <0 5 0x4>; /* Level high type */
> +		reg = <0x3>;
> +	};
> +};
> -- 
> 2.25.1
>