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Message-ID: <CAF12kFsvmaAbpVQSRLcCk8wVzvEVX3bovTGCnnMjMm6nT_O53Q@mail.gmail.com>
Date:   Mon, 11 Apr 2022 20:50:04 +0800
From:   Cixi Geng <gengcixi@...il.com>
To:     Jonathan Cameron <jic23@...nel.org>
Cc:     Lars-Peter Clausen <lars@...afoo.de>,
        Rob Herring <robh+dt@...nel.org>,
        Orson Zhai <orsonzhai@...il.com>,
        "baolin.wang7@...il.com" <baolin.wang7@...il.com>,
        Chunyan Zhang <zhang.lyra@...il.com>,
        朱玉明 (Yuming Zhu/11457) 
        <yuming.zhu1@...soc.com>, linux-iio@...r.kernel.org,
        Devicetree List <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V3 2/7] iio: adc: sc27xx: fix read big scale voltage not right

Jonathan Cameron <jic23@...nel.org> 于2022年4月11日周一 00:02写道:
>
> On Thu,  7 Apr 2022 16:21:43 +0800
> Cixi Geng <gengcixi@...il.com> wrote:
>
> > From: Cixi Geng <cixi.geng1@...soc.com>
> >
> > Fix wrong configuration value of SC27XX_ADC_SCALE_MASK and
> > SC27XX_ADC_SCALE_SHIFT by spec documetation.
> >
> > Signed-off-by: Cixi Geng <cixi.geng1@...soc.com>
> > Reviewed-by: Baolin Wang <baolin.wang7@...il.com>
> Fixes tag?
Fixes: 5df362a6cf49c (iio: adc: Add Spreadtrum SC27XX PMICs ADC support)
> No need to resend for this though, just reply with the appropriate
> tag so when I use b4 it'll be picked up.
>
> Thanks,
>
> Jonathan
>
> > ---
> >  drivers/iio/adc/sc27xx_adc.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c
> > index 00098caf6d9e..aee076c8e2b1 100644
> > --- a/drivers/iio/adc/sc27xx_adc.c
> > +++ b/drivers/iio/adc/sc27xx_adc.c
> > @@ -36,8 +36,8 @@
> >
> >  /* Bits and mask definition for SC27XX_ADC_CH_CFG register */
> >  #define SC27XX_ADC_CHN_ID_MASK               GENMASK(4, 0)
> > -#define SC27XX_ADC_SCALE_MASK                GENMASK(10, 8)
> > -#define SC27XX_ADC_SCALE_SHIFT               8
> > +#define SC27XX_ADC_SCALE_MASK                GENMASK(10, 9)
> > +#define SC27XX_ADC_SCALE_SHIFT               9
> >
> >  /* Bits definitions for SC27XX_ADC_INT_EN registers */
> >  #define SC27XX_ADC_IRQ_EN            BIT(0)
>

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