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Message-ID: <YlQ6I3ZzMDpU0Sjd@matsya>
Date:   Mon, 11 Apr 2022 19:54:35 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Herve Codina <herve.codina@...tlin.com>
Cc:     Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH 1/1] dmaengine: dw-edma: Fix unaligned 64bit access

On 25-02-22, 13:02, Herve Codina wrote:
> On some arch (ie aarch64 iMX8MM) unaligned PCIe accesses are
> not allowed and lead to a kernel Oops.
>   [ 1911.668835] Unable to handle kernel paging request at virtual address ffff80001bc00a8c
>   [ 1911.668841] Mem abort info:
>   [ 1911.668844]   ESR = 0x96000061
>   [ 1911.668847]   EC = 0x25: DABT (current EL), IL = 32 bits
>   [ 1911.668850]   SET = 0, FnV = 0
>   [ 1911.668852]   EA = 0, S1PTW = 0
>   [ 1911.668853] Data abort info:
>   [ 1911.668855]   ISV = 0, ISS = 0x00000061
>   [ 1911.668857]   CM = 0, WnR = 1
>   [ 1911.668861] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000040ff4000
>   [ 1911.668864] [ffff80001bc00a8c] pgd=00000000bffff003, pud=00000000bfffe003, pmd=0068000018400705
>   [ 1911.668872] Internal error: Oops: 96000061 [#1] PREEMPT SMP
>   ...
> 
> The llp register present in the channel group registers is not
> aligned on 64bit.
> 
> Fix unaligned 64bit access using two 32bit accesses

Applied, thanks

-- 
~Vinod

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