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Date: Wed, 13 Apr 2022 14:05:02 -0700
From: Ian Rogers <irogers@...gle.com>
To: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Kan Liang <kan.liang@...ux.intel.com>,
Xing Zhengjun <zhengjun.xing@...ux.intel.com>,
Andi Kleen <ak@...ux.intel.com>,
John Garry <john.garry@...wei.com>,
James Clark <james.clark@....com>,
linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org
Cc: Ian Rogers <irogers@...gle.com>
Subject: [PATCH 13/14] perf vendor events intel: Update goldmontplus event topics
Apply topic updates from:
https://github.com/intel/event-converter-for-linux-perf/
Signed-off-by: Ian Rogers <irogers@...gle.com>
---
.../arch/x86/goldmontplus/other.json | 37 +------------------
.../arch/x86/goldmontplus/pipeline.json | 37 ++++++++++++++++++-
2 files changed, 37 insertions(+), 37 deletions(-)
diff --git a/tools/perf/pmu-events/arch/x86/goldmontplus/other.json b/tools/perf/pmu-events/arch/x86/goldmontplus/other.json
index 3378f48cb818..92586fe4538a 100644
--- a/tools/perf/pmu-events/arch/x86/goldmontplus/other.json
+++ b/tools/perf/pmu-events/arch/x86/goldmontplus/other.json
@@ -57,40 +57,5 @@
"PublicDescription": "Counts hardware interrupts received by the processor.",
"SampleAfterValue": "203",
"UMask": "0x1"
- },
- {
- "BriefDescription": "Unfilled issue slots per cycle",
- "CollectPEBSRecord": "1",
- "Counter": "0,1,2,3",
- "EventCode": "0xCA",
- "EventName": "ISSUE_SLOTS_NOT_CONSUMED.ANY",
- "PDIR_COUNTER": "na",
- "PEBScounters": "0,1,2,3",
- "PublicDescription": "Counts the number of issue slots per core cycle that were not consumed by the backend due to either a full resource in the backend (RESOURCE_FULL) or due to the processor recovering from some event (RECOVERY).",
- "SampleAfterValue": "200003"
- },
- {
- "BriefDescription": "Unfilled issue slots per cycle to recover",
- "CollectPEBSRecord": "1",
- "Counter": "0,1,2,3",
- "EventCode": "0xCA",
- "EventName": "ISSUE_SLOTS_NOT_CONSUMED.RECOVERY",
- "PDIR_COUNTER": "na",
- "PEBScounters": "0,1,2,3",
- "PublicDescription": "Counts the number of issue slots per core cycle that were not consumed by the backend because allocation is stalled waiting for a mispredicted jump to retire or other branch-like conditions (e.g. the event is relevant during certain microcode flows). Counts all issue slots blocked while within this window including slots where uops were not available in the Instruction Queue.",
- "SampleAfterValue": "200003",
- "UMask": "0x2"
- },
- {
- "BriefDescription": "Unfilled issue slots per cycle because of a full resource in the backend",
- "CollectPEBSRecord": "1",
- "Counter": "0,1,2,3",
- "EventCode": "0xCA",
- "EventName": "ISSUE_SLOTS_NOT_CONSUMED.RESOURCE_FULL",
- "PDIR_COUNTER": "na",
- "PEBScounters": "0,1,2,3",
- "PublicDescription": "Counts the number of issue slots per core cycle that were not consumed because of a full resource in the backend. Including but not limited to resources such as the Re-order Buffer (ROB), reservation stations (RS), load/store buffers, physical registers, or any other needed machine resource that is currently unavailable. Note that uops must be available for consumption in order for this event to fire. If a uop is not available (Instruction Queue is empty), this event will not count.",
- "SampleAfterValue": "200003",
- "UMask": "0x1"
}
-]
\ No newline at end of file
+]
diff --git a/tools/perf/pmu-events/arch/x86/goldmontplus/pipeline.json b/tools/perf/pmu-events/arch/x86/goldmontplus/pipeline.json
index 8305e2ecf617..4d7e3129e5ac 100644
--- a/tools/perf/pmu-events/arch/x86/goldmontplus/pipeline.json
+++ b/tools/perf/pmu-events/arch/x86/goldmontplus/pipeline.json
@@ -290,6 +290,41 @@
"PublicDescription": "Counts INST_RETIRED.ANY using the Reduced Skid PEBS feature that reduces the shadow in which events aren't counted allowing for a more unbiased distribution of samples across instructions retired.",
"SampleAfterValue": "2000003"
},
+ {
+ "BriefDescription": "Unfilled issue slots per cycle",
+ "CollectPEBSRecord": "1",
+ "Counter": "0,1,2,3",
+ "EventCode": "0xCA",
+ "EventName": "ISSUE_SLOTS_NOT_CONSUMED.ANY",
+ "PDIR_COUNTER": "na",
+ "PEBScounters": "0,1,2,3",
+ "PublicDescription": "Counts the number of issue slots per core cycle that were not consumed by the backend due to either a full resource in the backend (RESOURCE_FULL) or due to the processor recovering from some event (RECOVERY).",
+ "SampleAfterValue": "200003"
+ },
+ {
+ "BriefDescription": "Unfilled issue slots per cycle to recover",
+ "CollectPEBSRecord": "1",
+ "Counter": "0,1,2,3",
+ "EventCode": "0xCA",
+ "EventName": "ISSUE_SLOTS_NOT_CONSUMED.RECOVERY",
+ "PDIR_COUNTER": "na",
+ "PEBScounters": "0,1,2,3",
+ "PublicDescription": "Counts the number of issue slots per core cycle that were not consumed by the backend because allocation is stalled waiting for a mispredicted jump to retire or other branch-like conditions (e.g. the event is relevant during certain microcode flows). Counts all issue slots blocked while within this window including slots where uops were not available in the Instruction Queue.",
+ "SampleAfterValue": "200003",
+ "UMask": "0x2"
+ },
+ {
+ "BriefDescription": "Unfilled issue slots per cycle because of a full resource in the backend",
+ "CollectPEBSRecord": "1",
+ "Counter": "0,1,2,3",
+ "EventCode": "0xCA",
+ "EventName": "ISSUE_SLOTS_NOT_CONSUMED.RESOURCE_FULL",
+ "PDIR_COUNTER": "na",
+ "PEBScounters": "0,1,2,3",
+ "PublicDescription": "Counts the number of issue slots per core cycle that were not consumed because of a full resource in the backend. Including but not limited to resources such as the Re-order Buffer (ROB), reservation stations (RS), load/store buffers, physical registers, or any other needed machine resource that is currently unavailable. Note that uops must be available for consumption in order for this event to fire. If a uop is not available (Instruction Queue is empty), this event will not count.",
+ "SampleAfterValue": "200003",
+ "UMask": "0x1"
+ },
{
"BriefDescription": "Loads blocked because address has 4k partial address false dependence (Precise event capable)",
"CollectPEBSRecord": "2",
@@ -456,4 +491,4 @@
"SampleAfterValue": "2000003",
"UMask": "0x1"
}
-]
\ No newline at end of file
+]
--
2.36.0.rc0.470.gd361397f0d-goog
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