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Message-Id: <20220413221916.50995-9-samuel@sholland.org>
Date: Wed, 13 Apr 2022 17:19:08 -0500
From: Samuel Holland <samuel@...lland.org>
To: Heiko Stübner <heiko@...ech.de>,
Sandy Huang <hjc@...k-chips.com>,
dri-devel@...ts.freedesktop.org
Cc: linux-rockchip@...ts.infradead.org,
Alistair Francis <alistair@...stair23.me>,
Ondřej Jirman <x@....cz>,
Andreas Kemnade <andreas@...nade.info>,
Daniel Vetter <daniel@...ll.ch>,
David Airlie <airlied@...ux.ie>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Samuel Holland <samuel@...lland.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Liang Chen <cl@...k-chips.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Michael Riesch <michael.riesch@...fvision.net>,
Nicolas Frattaroli <frattaroli.nicolas@...il.com>,
Peter Geis <pgwipeout@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Sam Ravnborg <sam@...nborg.org>,
Thierry Reding <thierry.reding@...il.com>,
Thomas Zimmermann <tzimmermann@...e.de>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [RFC PATCH 08/16] drm/rockchip: ebc: Add LUT loading
The EBC contains a 16 KiB SRAM which stores the current LUT. It needs to
be programmed any time the LUT changes or the hardware block is enabled.
Since both of these triggers can happen at the same time, use a flag to
avoid writing the LUT twice.
Signed-off-by: Samuel Holland <samuel@...lland.org>
---
drivers/gpu/drm/rockchip/Kconfig | 3 +-
drivers/gpu/drm/rockchip/rockchip_ebc.c | 76 +++++++++++++++++++++++++
2 files changed, 78 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index 9d3273a5fd97..efe4476e336d 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -94,7 +94,8 @@ endif
config DRM_ROCKCHIP_EBC
tristate "DRM Support for Rockchip EBC"
- depends on DRM
+ depends on DRM && IIO
+ select DRM_EPD_HELPER
select DRM_GEM_SHMEM_HELPER
select DRM_KMS_HELPER
help
diff --git a/drivers/gpu/drm/rockchip/rockchip_ebc.c b/drivers/gpu/drm/rockchip/rockchip_ebc.c
index 095d66e67c2f..ca3173b28d1c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_ebc.c
+++ b/drivers/gpu/drm/rockchip/rockchip_ebc.c
@@ -5,6 +5,7 @@
#include <linux/clk.h>
#include <linux/completion.h>
+#include <linux/iio/consumer.h>
#include <linux/irq.h>
#include <linux/kthread.h>
#include <linux/module.h>
@@ -122,6 +123,7 @@
#define EBC_WIN_MST2 0x0058
#define EBC_LUT_DATA 0x1000
+#define EBC_MAX_PHASES 256
#define EBC_NUM_LUT_REGS 0x1000
#define EBC_NUM_SUPPLIES 3
@@ -134,11 +136,15 @@ struct rockchip_ebc {
struct drm_crtc crtc;
struct drm_device drm;
struct drm_encoder encoder;
+ struct drm_epd_lut lut;
+ struct drm_epd_lut_file lut_file;
struct drm_plane plane;
+ struct iio_channel *temperature_channel;
struct regmap *regmap;
struct regulator_bulk_data supplies[EBC_NUM_SUPPLIES];
struct task_struct *refresh_thread;
u32 dsp_start;
+ bool lut_changed;
bool reset_complete;
};
@@ -282,10 +288,59 @@ static void rockchip_ebc_refresh(struct rockchip_ebc *ebc,
bool global_refresh,
enum drm_epd_waveform waveform)
{
+ struct drm_device *drm = &ebc->drm;
+ struct device *dev = drm->dev;
+ int ret, temperature;
+
+ /* Resume asynchronously while preparing to refresh. */
+ ret = pm_runtime_get(dev);
+ if (ret < 0) {
+ drm_err(drm, "Failed to request resume: %d\n", ret);
+ return;
+ }
+
+ ret = iio_read_channel_processed(ebc->temperature_channel, &temperature);
+ if (ret < 0) {
+ drm_err(drm, "Failed to get temperature: %d\n", ret);
+ } else {
+ /* Convert from millicelsius to celsius. */
+ temperature /= 1000;
+
+ ret = drm_epd_lut_set_temperature(&ebc->lut, temperature);
+ if (ret < 0)
+ drm_err(drm, "Failed to set LUT temperature: %d\n", ret);
+ else if (ret)
+ ebc->lut_changed = true;
+ }
+
+ ret = drm_epd_lut_set_waveform(&ebc->lut, waveform);
+ if (ret < 0)
+ drm_err(drm, "Failed to set LUT waveform: %d\n", ret);
+ else if (ret)
+ ebc->lut_changed = true;
+
+ /* Wait for the resume to complete before writing any registers. */
+ ret = pm_runtime_resume(dev);
+ if (ret < 0) {
+ drm_err(drm, "Failed to resume: %d\n", ret);
+ pm_runtime_put(dev);
+ return;
+ }
+
+ /* This flag may have been set above, or by the runtime PM callback. */
+ if (ebc->lut_changed) {
+ ebc->lut_changed = false;
+ regmap_bulk_write(ebc->regmap, EBC_LUT_DATA,
+ ebc->lut.buf, EBC_NUM_LUT_REGS);
+ }
+
if (global_refresh)
rockchip_ebc_global_refresh(ebc, ctx);
else
rockchip_ebc_partial_refresh(ebc, ctx);
+
+ pm_runtime_mark_last_busy(dev);
+ pm_runtime_put_autosuspend(dev);
}
static int rockchip_ebc_refresh_thread(void *data)
@@ -708,6 +763,15 @@ static int rockchip_ebc_drm_init(struct rockchip_ebc *ebc)
struct drm_bridge *bridge;
int ret;
+ ret = drmm_epd_lut_file_init(drm, &ebc->lut_file, "rockchip/ebc.wbf");
+ if (ret)
+ return ret;
+
+ ret = drmm_epd_lut_init(&ebc->lut_file, &ebc->lut,
+ DRM_EPD_LUT_4BIT_PACKED, EBC_MAX_PHASES);
+ if (ret)
+ return ret;
+
ret = drmm_mode_config_init(drm);
if (ret)
return ret;
@@ -810,6 +874,13 @@ static int rockchip_ebc_runtime_resume(struct device *dev)
if (ret)
goto err_disable_hclk;
+ /*
+ * Do not restore the LUT registers here, because the temperature or
+ * waveform may have changed since the last refresh. Instead, have the
+ * refresh thread program the LUT during the next refresh.
+ */
+ ebc->lut_changed = true;
+
regcache_cache_only(ebc->regmap, false);
regcache_mark_dirty(ebc->regmap);
regcache_sync(ebc->regmap);
@@ -919,6 +990,11 @@ static int rockchip_ebc_probe(struct platform_device *pdev)
return dev_err_probe(dev, PTR_ERR(ebc->hclk),
"Failed to get hclk\n");
+ ebc->temperature_channel = devm_iio_channel_get(dev, NULL);
+ if (IS_ERR(ebc->temperature_channel))
+ return dev_err_probe(dev, PTR_ERR(ebc->temperature_channel),
+ "Failed to get temperature I/O channel\n");
+
for (i = 0; i < EBC_NUM_SUPPLIES; i++)
ebc->supplies[i].supply = rockchip_ebc_supplies[i];
--
2.35.1
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