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Date: Wed, 13 Apr 2022 13:07:15 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Stephen Boyd <swboyd@...omium.org>
Cc: Georgi Djakov <djakov@...nel.org>, linux-kernel@...r.kernel.org,
patches@...ts.linux.dev, linux-arm-msm@...r.kernel.org,
linux-pm@...r.kernel.org, Alex Elder <elder@...aro.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Taniya Das <quic_tdas@...cinc.com>,
Mike Tipton <quic_mdtipton@...cinc.com>
Subject: Re: [PATCH 2/2] interconnect: qcom: sdx55: Drop IP0 interconnects
On Tue, Apr 12, 2022 at 03:00:33PM -0700, Stephen Boyd wrote:
> Similar to the sc7180 commit, let's drop the IP0 interconnects here
> because the IP0 resource is also used in the clk-rpmh driver on sdx55.
> It's bad to have the clk framework and interconnect framework control
> the same RPMh resource without any coordination. The rpmh driver in the
> kernel doesn't aggregate resources between clients either, so leaving
> control to clk-rpmh avoids any issues with unused interconnects turning
> off IP0 behind the back of the clk framework.
>
> Cc: Alex Elder <elder@...aro.org>
> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
> Cc: Taniya Das <quic_tdas@...cinc.com>
> Cc: Mike Tipton <quic_mdtipton@...cinc.com>
> Fixes: b2150cab9a97 ("clk: qcom: rpmh: add support for SDX55 rpmh IPA clock")
> Signed-off-by: Stephen Boyd <swboyd@...omium.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Thanks,
Mani
> ---
> drivers/interconnect/qcom/sdx55.c | 21 ---------------------
> 1 file changed, 21 deletions(-)
>
> diff --git a/drivers/interconnect/qcom/sdx55.c b/drivers/interconnect/qcom/sdx55.c
> index 03d604f84cc5..e3ac25a997b7 100644
> --- a/drivers/interconnect/qcom/sdx55.c
> +++ b/drivers/interconnect/qcom/sdx55.c
> @@ -18,7 +18,6 @@
> #include "icc-rpmh.h"
> #include "sdx55.h"
>
> -DEFINE_QNODE(ipa_core_master, SDX55_MASTER_IPA_CORE, 1, 8, SDX55_SLAVE_IPA_CORE);
> DEFINE_QNODE(llcc_mc, SDX55_MASTER_LLCC, 4, 4, SDX55_SLAVE_EBI_CH0);
> DEFINE_QNODE(acm_tcu, SDX55_MASTER_TCU_0, 1, 8, SDX55_SLAVE_LLCC, SDX55_SLAVE_MEM_NOC_SNOC, SDX55_SLAVE_MEM_NOC_PCIE_SNOC);
> DEFINE_QNODE(qnm_snoc_gc, SDX55_MASTER_SNOC_GC_MEM_NOC, 1, 8, SDX55_SLAVE_LLCC);
> @@ -40,7 +39,6 @@ DEFINE_QNODE(xm_pcie, SDX55_MASTER_PCIE, 1, 8, SDX55_SLAVE_ANOC_SNOC);
> DEFINE_QNODE(xm_qdss_etr, SDX55_MASTER_QDSS_ETR, 1, 8, SDX55_SLAVE_SNOC_CFG, SDX55_SLAVE_EMAC_CFG, SDX55_SLAVE_USB3, SDX55_SLAVE_AOSS, SDX55_SLAVE_SPMI_FETCHER, SDX55_SLAVE_QDSS_CFG, SDX55_SLAVE_PDM, SDX55_SLAVE_SNOC_MEM_NOC_GC, SDX55_SLAVE_TCSR, SDX55_SLAVE_CNOC_DDRSS, SDX55_SLAVE_SPMI_VGI_COEX, SDX55_SLAVE_QPIC, SDX55_SLAVE_OCIMEM, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_USB3_PHY_CFG, SDX55_SLAVE_AOP, SDX55_SLAVE_BLSP_1, SDX55_SLAVE_SDCC_1, SDX55_SLAVE_CNOC_MSS, SDX55_SLAVE_PCIE_PARF, SDX55_SLAVE_ECC_CFG, SDX55_SLAVE_AUDIO, SDX55_SLAVE_AOSS, SDX55_SLAVE_PRNG, SDX55_SLAVE_CRYPTO_0_CFG, SDX55_SLAVE_TCU, SDX55_SLAVE_CLK_CTL, SDX55_SLAVE_IMEM_CFG);
> DEFINE_QNODE(xm_sdc1, SDX55_MASTER_SDCC_1, 1, 8, SDX55_SLAVE_AOSS, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_ANOC_SNOC, SDX55_SLAVE_AOP, SDX55_SLAVE_AUDIO);
> DEFINE_QNODE(xm_usb3, SDX55_MASTER_USB3, 1, 8, SDX55_SLAVE_ANOC_SNOC);
> -DEFINE_QNODE(ipa_core_slave, SDX55_SLAVE_IPA_CORE, 1, 8);
> DEFINE_QNODE(ebi, SDX55_SLAVE_EBI_CH0, 1, 4);
> DEFINE_QNODE(qns_llcc, SDX55_SLAVE_LLCC, 1, 16, SDX55_SLAVE_EBI_CH0);
> DEFINE_QNODE(qns_memnoc_snoc, SDX55_SLAVE_MEM_NOC_SNOC, 1, 8, SDX55_MASTER_MEM_NOC_SNOC);
> @@ -82,7 +80,6 @@ DEFINE_QNODE(xs_sys_tcu_cfg, SDX55_SLAVE_TCU, 1, 8);
> DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
> DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
> DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
> -DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
> DEFINE_QBCM(bcm_pn0, "PN0", false, &qhm_snoc_cfg);
> DEFINE_QBCM(bcm_sh3, "SH3", false, &xm_apps_rdwr);
> DEFINE_QBCM(bcm_sh4, "SH4", false, &qns_memnoc_snoc, &qns_sys_pcie);
> @@ -219,22 +216,6 @@ static const struct qcom_icc_desc sdx55_system_noc = {
> .num_bcms = ARRAY_SIZE(system_noc_bcms),
> };
>
> -static struct qcom_icc_bcm *ipa_virt_bcms[] = {
> - &bcm_ip0,
> -};
> -
> -static struct qcom_icc_node *ipa_virt_nodes[] = {
> - [MASTER_IPA_CORE] = &ipa_core_master,
> - [SLAVE_IPA_CORE] = &ipa_core_slave,
> -};
> -
> -static const struct qcom_icc_desc sdx55_ipa_virt = {
> - .nodes = ipa_virt_nodes,
> - .num_nodes = ARRAY_SIZE(ipa_virt_nodes),
> - .bcms = ipa_virt_bcms,
> - .num_bcms = ARRAY_SIZE(ipa_virt_bcms),
> -};
> -
> static const struct of_device_id qnoc_of_match[] = {
> { .compatible = "qcom,sdx55-mc-virt",
> .data = &sdx55_mc_virt},
> @@ -242,8 +223,6 @@ static const struct of_device_id qnoc_of_match[] = {
> .data = &sdx55_mem_noc},
> { .compatible = "qcom,sdx55-system-noc",
> .data = &sdx55_system_noc},
> - { .compatible = "qcom,sdx55-ipa-virt",
> - .data = &sdx55_ipa_virt},
> { }
> };
> MODULE_DEVICE_TABLE(of, qnoc_of_match);
> --
> https://chromeos.dev
>
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