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Message-ID: <32df5270-9df8-c5be-a9d2-9764409a2711@linaro.org>
Date:   Wed, 13 Apr 2022 10:40:16 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Ansuel Smith <ansuelsmth@...il.com>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     Jonathan McDowell <noodles@...th.li>
Subject: Re: [PATCH v3 06/18] ARM: dts: qcom: enable usb phy by default for
 ipq8064

On 09/03/2022 22:01, Ansuel Smith wrote:
> Enable usb phy by default. When the usb phy were pushed, half of them
> were flagged as disabled by mistake. Fix this to correctly init dwc3
> node on any ipq8064 based SoC.

Typically they would be disabled in the platform dtsi file and would be 
enabled one-by-one in the board dts file. So, if half of usb phys are 
enabled by default, I'd kindly ask to perform the opposite change: 
disable all of them by default and enable in board dts files.

> 
> Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> Tested-by: Jonathan McDowell <noodles@...th.li>
> ---
>   arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ----
>   1 file changed, 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 9d658fcc1f12..e247bf51df01 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -1175,8 +1175,6 @@ hs_phy_0: phy@...f8800 {
>   			clocks = <&gcc USB30_0_UTMI_CLK>;
>   			clock-names = "ref";
>   			#phy-cells = <0>;
> -
> -			status = "disabled";
>   		};
>   
>   		ss_phy_0: phy@...f8830 {
> @@ -1185,8 +1183,6 @@ ss_phy_0: phy@...f8830 {
>   			clocks = <&gcc USB30_0_MASTER_CLK>;
>   			clock-names = "ref";
>   			#phy-cells = <0>;
> -
> -			status = "disabled";
>   		};
>   
>   		usb3_0: usb3@...f8800 {


-- 
With best wishes
Dmitry

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