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Message-ID: <20220413090510.4039589-4-li.meng@amd.com>
Date: Wed, 13 Apr 2022 17:05:10 +0800
From: Meng Li <li.meng@....com>
To: Shuah Khan <skhan@...uxfoundation.org>,
"Rafael J . Wysocki" <rafael.j.wysocki@...el.com>,
Huang Rui <ray.huang@....com>, <linux-pm@...r.kernel.org>
CC: Nathan Fontenot <nathan.fontenot@....com>,
Deepak Sharma <deepak.sharma@....com>,
Alex Deucher <alexander.deucher@....com>,
"Mario Limonciello" <mario.limonciello@....com>,
Jinzhou Su <Jinzhou.Su@....com>,
Perry Yuan <Perry.Yuan@....com>,
Xiaojian Du <Xiaojian.Du@....com>,
"Viresh Kumar" <viresh.kumar@...aro.org>,
Borislav Petkov <bp@...en8.de>, <linux-kernel@...r.kernel.org>,
Meng Li <li.meng@....com>
Subject: [PATCH 3/3] selftests: cpufreq: Add amd_pstate_testmod kernel module for testing
Add amd_pstate_testmod module, which is conceptually out-of-tree module and
provides ways for selftests/cpufreq amd pstate driver to test various
kernel module-related functionality. This module will be expected by some
of selftests to be present and loaded.
Signed-off-by: Meng Li <li.meng@....com>
---
.../cpufreq/amd_pstate_testmod/Makefile | 20 ++
.../amd_pstate_testmod/amd_pstate_testmod.c | 302 ++++++++++++++++++
2 files changed, 322 insertions(+)
create mode 100644 tools/testing/selftests/cpufreq/amd_pstate_testmod/Makefile
create mode 100644 tools/testing/selftests/cpufreq/amd_pstate_testmod/amd_pstate_testmod.c
diff --git a/tools/testing/selftests/cpufreq/amd_pstate_testmod/Makefile b/tools/testing/selftests/cpufreq/amd_pstate_testmod/Makefile
new file mode 100644
index 000000000000..8a5596cb2c18
--- /dev/null
+++ b/tools/testing/selftests/cpufreq/amd_pstate_testmod/Makefile
@@ -0,0 +1,20 @@
+AMD_PSTATE_TESTMOD_DIR := $(realpath $(dir $(abspath $(lastword $(MAKEFILE_LIST)))))
+KDIR ?= $(abspath $(AMD_PSATE_TESTMOD_DIR)/../../../../..)
+
+ifeq ($(V),1)
+Q =
+else
+Q = @
+endif
+
+MODULES = amd_pstate_testmod.ko
+
+obj-m += amd_pstate_testmod.o
+CFLAGS_amd_pstate_testmod.o = -I$(src)
+
+all:
+ +$(Q)make -C $(KDIR) M=$(AMD_PSTATE_TESTMOD_DIR) modules
+
+clean:
+ +$(Q)make -C $(KDIR) M=$(AMD_PSTATE_TESTMOD_DIR) clean
+
diff --git a/tools/testing/selftests/cpufreq/amd_pstate_testmod/amd_pstate_testmod.c b/tools/testing/selftests/cpufreq/amd_pstate_testmod/amd_pstate_testmod.c
new file mode 100644
index 000000000000..a892cecf19da
--- /dev/null
+++ b/tools/testing/selftests/cpufreq/amd_pstate_testmod/amd_pstate_testmod.c
@@ -0,0 +1,302 @@
+// SPDX-License-Identifier: GPL-1.0-or-later
+/*
+ * AMD Processor P-state Frequency Driver Unit Test
+ *
+ * Copyright (C) 2022 Advanced Micro Devices, Inc. All Rights Reserved.
+ *
+ * Author: Meng Li <li.meng@....com>
+ *
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include "../../kselftest_module.h"
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/fs.h>
+#include <linux/amd-pstate.h>
+
+#include <acpi/cppc_acpi.h>
+
+/*
+ * Abbreviations:
+ * aput: used as a shortform for AMD P-State unit test.
+ * It helps to keep variable names smaller, simpler
+*/
+
+KSTM_MODULE_GLOBALS();
+
+/*
+ * Kernel module for testing the AMD P-State unit test
+ */
+enum aput_result {
+ APUT_RESULT_PASS, //0
+ APUT_RESULT_FAIL, //
+ MAX_APUT_RESULT,
+};
+
+struct aput_struct {
+ const char *name;
+ void (*func)(u32 index);
+ enum aput_result result;
+};
+
+static void aput_x86_vendor(u32 index);
+static void aput_acpi_cpc(u32 index);
+static void aput_modprobed_driver(u32 index);
+static void aput_capability_check(u32 index);
+static void aput_enable(u32 index);
+static void aput_init_perf(u32 index);
+static void aput_support_boost(u32 index);
+
+static struct aput_struct aput_cases[] = {
+ {"x86_vendor", aput_x86_vendor },
+ {"acpi_cpc_valid", aput_acpi_cpc },
+ {"modprobed_driver", aput_modprobed_driver },
+ {"capability_check", aput_capability_check },
+ {"enable", aput_enable },
+ {"init_perf", aput_init_perf },
+ {"support_boost", aput_support_boost }
+};
+
+static bool get_shared_mem(void)
+{
+ bool result = false;
+ char buf[5] = {0};
+ struct file *filp = NULL;
+ loff_t pos = 0;
+ ssize_t ret;
+
+ filp = filp_open("/sys/module/amd_pstate/parameters/shared_mem", FMODE_PREAD, 0);
+ if (IS_ERR(filp))
+ {
+ pr_err("%s Open param file fail! \n", __func__);
+ }
+ else
+ {
+ ret = kernel_read(filp, &buf, sizeof(buf), &pos);
+ if (ret < 0)
+ {
+ pr_err("%s ret=%ld unable to read from param file! \n", __func__, ret);
+ }
+ filp_close(filp, NULL);
+ }
+
+ if ('Y' == *buf)
+ {
+ result = true;
+ }
+
+ return (result);
+}
+
+static void aput_x86_vendor(u32 index)
+{
+ if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+ {
+ aput_cases[index].result = APUT_RESULT_PASS;
+ }
+ else
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ }
+}
+
+static void aput_acpi_cpc(u32 index)
+{
+ if (acpi_cpc_valid())
+ {
+ aput_cases[index].result = APUT_RESULT_PASS;
+ }
+ else
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ }
+}
+
+static void aput_modprobed_driver(u32 index)
+{
+ if (cpufreq_get_current_driver())
+ {
+ aput_cases[index].result = APUT_RESULT_PASS;
+ }
+ else
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ }
+}
+
+static void aput_capability_check(u32 index)
+{
+ if (boot_cpu_has(X86_FEATURE_CPPC))
+ {
+ aput_cases[index].result = APUT_RESULT_PASS;
+ }
+ else
+ {
+ //shared memory
+ if (get_shared_mem())
+ {
+ aput_cases[index].result = APUT_RESULT_PASS;
+ }
+ else
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ }
+ }
+}
+
+static void aput_pstate_enable(u32 index)
+{
+ int ret = 0;
+ u64 cppc_enable = 0;
+
+ ret = rdmsrl_safe(MSR_AMD_CPPC_ENABLE, &cppc_enable);
+ if (ret)
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ pr_err("%s rdmsrl_safe MSR_AMD_CPPC_ENABLE ret=%d is error! \n", __func__, ret);
+ return;
+ }
+ if (cppc_enable)
+ {
+ aput_cases[index].result = APUT_RESULT_PASS;
+ }
+ else
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ }
+}
+
+static void aput_enable(u32 index)
+{
+ if (get_shared_mem())
+ {
+ //not check
+ aput_cases[index].result = APUT_RESULT_PASS;
+ }
+ else
+ {
+ aput_pstate_enable(index);
+ }
+}
+
+static void aput_init_perf(u32 index)
+{
+ int cpu = 0, ret = 0;
+ u32 highest_perf = 0, nominal_perf = 0, lowest_nonlinear_perf = 0, lowest_perf = 0;
+ u64 cap1 = 0;
+ struct cppc_perf_caps cppc_perf;
+ struct cpufreq_policy *policy = NULL;
+ struct amd_cpudata *cpudata = NULL;
+
+ //get perf
+ highest_perf = amd_get_highest_perf();
+
+ for_each_possible_cpu(cpu)
+ {
+ //get amd cpudata
+ policy = cpufreq_cpu_get(cpu);
+ if (!policy)
+ break;
+ cpudata = policy->driver_data;
+
+ if (get_shared_mem())
+ {
+ ret = cppc_get_perf_caps(cpu, &cppc_perf);
+ if (ret)
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ pr_err("%s cppc_get_perf_caps ret=%d is error! \n", __func__, ret);
+ return;
+ }
+
+ nominal_perf = cppc_perf.nominal_perf;
+ lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf;
+ lowest_perf = cppc_perf.lowest_perf;
+ }
+ else
+ {
+ ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1);
+ if (ret)
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ pr_err("%s rdmsrl_safe_on_cpu MSR_AMD_CPPC_CAP1 ret=%d is error! \n", __func__, ret);
+ return;
+ }
+
+ //get perf from MSR
+ nominal_perf = AMD_CPPC_NOMINAL_PERF(cap1);
+ lowest_nonlinear_perf = AMD_CPPC_LOWNONLIN_PERF(cap1);
+ lowest_perf = AMD_CPPC_LOWEST_PERF(cap1);
+ }
+
+ //check highest_perf,nominal_perf,lowest_nonlinear_perf
+ if ((highest_perf != READ_ONCE(cpudata->highest_perf)) ||
+ (nominal_perf != READ_ONCE(cpudata->nominal_perf)) ||
+ (lowest_nonlinear_perf != READ_ONCE(cpudata->lowest_nonlinear_perf)) ||
+ (lowest_perf != READ_ONCE(cpudata->lowest_perf)))
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ pr_err("%s cpu%d highest_perf=%d %d nominal_perf=%d %d lowest_nonlinear_perf=%d %d lowest_perf=%d %d are not equal! \n",
+ __func__, cpu, highest_perf, cpudata->highest_perf,
+ nominal_perf, cpudata->nominal_perf,
+ lowest_nonlinear_perf, cpudata->lowest_nonlinear_perf,
+ lowest_perf, cpudata->lowest_perf);
+ return;
+ }
+ }
+
+ aput_cases[index].result = APUT_RESULT_PASS;
+}
+
+static void aput_support_boost(u32 index)
+{
+ int cpu = 0;
+ struct cpufreq_policy *policy = NULL;
+ struct amd_cpudata *cpudata = NULL;
+
+ for_each_possible_cpu(cpu)
+ {
+ //get amd cpudata
+ policy = cpufreq_cpu_get(cpu);
+ if (!policy)
+ break;
+ cpudata = policy->driver_data;
+
+ if (READ_ONCE(cpudata->boost_supported))
+ {
+ aput_cases[index].result = APUT_RESULT_PASS;
+ }
+ else
+ {
+ aput_cases[index].result = APUT_RESULT_FAIL;
+ break;
+ }
+ }
+}
+
+static void aput_do_test_case(void)
+{
+ u32 i=0, arr_size = ARRAY_SIZE(aput_cases);
+
+ for (i = 0; i < arr_size; i++)
+ {
+ pr_info("****** Begin %-5d\t %-20s\t ******\n", i+1, aput_cases[i].name);
+ aput_cases[i].func(i);
+ KSTM_CHECK_ZERO(aput_cases[i].result);
+ pr_info("****** End %-5d\t %-20s\t ******\n", i+1, aput_cases[i].name);
+ }
+}
+
+static void __init selftest(void)
+{
+ aput_do_test_case();
+}
+
+KSTM_MODULE_LOADERS(amd_pstate_testmod);
+MODULE_AUTHOR("Meng Li <li.meng@....com>");
+MODULE_DESCRIPTION("Unit test for AMD P-state driver");
+MODULE_LICENSE("GPL");
--
2.25.1
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