linux-kernel - Re: [PATCH v9 12/12] riscv: add memory-type errata for T-Head

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Message-ID: <CAAeLtUB=FTTD32j6AP7Mv1DsaP3VDUkZcHAAmB6i-iD+A4zvmA@mail.gmail.com>
Date:   Wed, 13 Apr 2022 11:17:34 +0200
From:   Philipp Tomsich <philipp.tomsich@...ll.eu>
To:     Heiko Stuebner <heiko@...ech.de>
Cc:     palmer@...belt.com, paul.walmsley@...ive.com,
        aou@...s.berkeley.edu, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org, wefu@...hat.com,
        liush@...winnertech.com, guoren@...nel.org, atishp@...shpatra.org,
        anup@...infault.org, drew@...gleboard.org, hch@....de,
        arnd@...db.de, wens@...e.org, maxime@...no.tech,
        gfavor@...tanamicro.com, andrea.mondelli@...wei.com,
        behrensj@....edu, xinhaoqu@...wei.com, mick@....forth.gr,
        allen.baum@...erantotech.com, jscheid@...tanamicro.com,
        rtrauben@...il.com, samuel@...lland.org, cmuellner@...ux.com
Subject: Re: [PATCH v9 12/12] riscv: add memory-type errata for T-Head

On Wed, 13 Apr 2022 at 05:06, Heiko Stuebner <heiko@...ech.de> wrote:
>
> Some current cpus based on T-Head cores implement memory-types
> way different than described in the svpbmt spec even going
> so far as using PTE bits marked as reserved.
>
> Add the T-Head vendor-id and necessary errata code to
> replace the affected instructions.
>
> Signed-off-by: Heiko Stuebner <heiko@...ech.de>
> Tested-by: Samuel Holland <samuel@...lland.org>

Reviewed-by: Philipp Tomsich <philipp.tomsich@...ll.eu>