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Message-ID: <41fa58ee-728b-7f0d-eea7-448c59641d85@linaro.org>
Date: Wed, 13 Apr 2022 17:37:30 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Arınç ÜNAL <arinc.unal@...nc9.com>,
Sergio Paracuellos <sergio.paracuellos@...il.com>,
Luiz Angelo Daros de Luca <luizluca@...il.com>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Matthias Brugger <matthias.bgg@...il.com>
Cc: erkin.bozoglu@...ont.com, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mips@...r.kernel.org
Subject: Re: [PATCH 11/14] dt-bindings: pinctrl: add binding for Ralink MT7620
pinctrl
On 13/04/2022 08:07, Arınç ÜNAL wrote:
> Add binding for the Ralink MT7620 pin controller for MT7620, MT7628 and
> MT7688 SoCs.
>
> Signed-off-by: Arınç ÜNAL <arinc.unal@...nc9.com>
> ---
> .../pinctrl/ralink,mt7620-pinctrl.yaml | 87 +++++++++++++++++++
> 1 file changed, 87 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
> new file mode 100644
> index 000000000000..01578b8aa277
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
> @@ -0,0 +1,87 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/ralink,mt7620-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Ralink MT7620 Pin Controller
> +
> +maintainers:
> + - Arınç ÜNAL <arinc.unal@...nc9.com>
> + - Sergio Paracuellos <sergio.paracuellos@...il.com>
> +
> +description:
> + Ralink MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs.
> + The pin controller can only set the muxing of pin groups. Muxing indiviual pins
Run spellcheck on original bindings, don't copy same typos.
> + is not supported. There is no pinconf support.
> +
> +properties:
> + compatible:
> + const: ralink,mt7620-pinctrl
> +
> +patternProperties:
> + '-pins$':
> + type: object
> + patternProperties:
> + '^(.*-)?pinmux$':
Why do you have two levels here? pins->pinmux->actual pin configuration?
Cannot be something like brcm,bcm636x has?
> + type: object
> + description: node for pinctrl.
> + $ref: pinmux-node.yaml#
> +
> + properties:
> + groups:
> + description: The pin group to select.
I wonder where do you configure particular pins because these are
groups... It's a bit confusing to configure "i2c" group into "i2c" -
looks obvious.
> + enum: [
> + # For MT7620 SoC
> + ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi, spi refclk, uartf, uartlite, wdt, wled,
> +
> + # For MT7628 and MT7688 SoCs
> + gpio, i2c, i2s, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an,
> + p3led_kn, p4led_an, p4led_kn, perst, pwm0, pwm1, refclk, sdmode, spi, spi cs1, spis, uart0,
> + uart1, uart2, wdt, wled_an, wled_kn,
> + ]
> +
> + function:
> + description: The mux function to select.
> + enum: [
> + # For MT7620 SoC
> + ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand, pa, pcie refclk, pcie rst,
> + pcm gpio, pcm i2s, pcm uartf, refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite,
> + wdt refclk, wdt rst, wled,
> +
> + # For MT7628 and MT7688 SoCs
> + antenna, debug, gpio, i2c, i2s, jtag, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an,
> + p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1,
> + pwm_uart2, refclk, rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7, spi, spi cs1, spis, sw_r, uart0,
> + uart1, uart2, utif, wdt, wled_an, wled_kn, -,
All these lines do not fit in 80-character limit. Linux coding style
still expects this in most of cases.
> + ]
> +
Best regards,
Krzysztof
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