[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <1bd1ab210eae96fdd0280b9ef6876ae918d48cb3.camel@nxp.com>
Date: Thu, 14 Apr 2022 14:35:29 +0800
From: Liu Ying <victor.liu@....com>
To: Vinod Koul <vkoul@...nel.org>
Cc: linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, dri-devel@...ts.freedesktop.org,
linux-arm-kernel@...ts.infradead.org, kishon@...com,
robh+dt@...nel.org, andrzej.hajda@...el.com,
narmstrong@...libre.com, Laurent.pinchart@...asonboard.com,
jonas@...boo.se, jernej.skrabec@...il.com, airlied@...ux.ie,
daniel@...ll.ch, shawnguo@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
agx@...xcpu.org, robert.chiras@....com, martin.kepplinger@...i.sm,
robert.foss@...aro.org
Subject: Re: [PATCH v6 resend 2/5] phy: Add LVDS configuration options
On Thu, 2022-04-14 at 11:07 +0530, Vinod Koul wrote:
> On 13-04-22, 20:39, Liu Ying wrote:
> > On Wed, 2022-04-13 at 16:19 +0530, Vinod Koul wrote:
> > > On 13-04-22, 18:04, Liu Ying wrote:
> > > > Hi Vinod,
> > > >
> > > > On Wed, 2022-04-13 at 11:41 +0530, Vinod Koul wrote:
> > > > > On 02-04-22, 13:24, Liu Ying wrote:
> > > > > > This patch allows LVDS PHYs to be configured through
> > > > > > the generic functions and through a custom structure
> > > > > > added to the generic union.
> > > > > >
> > > > > > The parameters added here are based on common LVDS PHY
> > > > > > implementation practices. The set of parameters
> > > > > > should cover all potential users.
> > > > > >
> > > > > > Cc: Kishon Vijay Abraham I <kishon@...com>
> > > > > > Cc: Vinod Koul <vkoul@...nel.org>
> > > > > > Cc: NXP Linux Team <linux-imx@....com>
> > > > > > Signed-off-by: Liu Ying <victor.liu@....com>
> > > > > > ---
> >
> > [...]
> >
> > > > > > + */
> > > > > > +
> > > > > > +#ifndef __PHY_LVDS_H_
> > > > > > +#define __PHY_LVDS_H_
> > > > > > +
> > > > > > +/**
> > > > > > + * struct phy_configure_opts_lvds - LVDS configuration set
> > > > > > + * @bits_per_lane_and_dclk_cycle: Number of bits per data
> > > > > > lane
> > > > > > and
> > > > > > + * differential clock
> > > > > > cycle.
> > > > >
> > > > > What does it mean by bits per data lane and differential
> > > > > clock
> > > > > cycle?
> > > >
> > > > Please check
> > > > Documentation/devicetree/bindings/display/panel/lvds.yaml.
> > > > lvds.yaml metions slot. 'bits_per_lane_and_dclk_cycle' means
> > > > the
> > > > number of slots. But, I don't find the word 'slot' in my lvds
> > > > relevant
> > > > specs which mentioned in lvds.yaml, so 'slots' is probably not
> > > > a
> > > > generic name(lvds.yaml is for display panel). So, I use
> > > > 'bits_per_lane_and_dclk_cycle' as the name tells what it means.
> > >
> > > variable name is fine, explanation for bit per lane and
> > > differential
> > > clock cycle didnt help, maybe add better explanation of what this
> > > variable means
> >
> > I may add an example diagram as below...
>
> Not really a diagram, you can add if you like.. But something which
> explains in a sentence or few about the variable.
Ok, no diagram.
>
> bits per lane per differential clock cycle ?
Ok, will use this explaination.
Regards,
Liu Ying
Powered by blists - more mailing lists