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Message-ID: <CAJ9a7VjZiYN6g+gPZRgc4fJQCJYcSXrdzRfT+kAiK0cwRfm+iA@mail.gmail.com>
Date: Thu, 14 Apr 2022 16:22:54 +0100
From: Mike Leach <mike.leach@...aro.org>
To: Mao Jinlong <quic_jinlmao@...cinc.com>
Cc: Mathieu Poirier <mathieu.poirier@...aro.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Leo Yan <leo.yan@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Tingwei Zhang <quic_tingweiz@...cinc.com>,
Yuanfang Zhang <quic_yuanfang@...cinc.com>,
Tao Zhang <quic_taozha@...cinc.com>,
Trilok Soni <quic_tsoni@...cinc.com>,
Hao Zhang <quic_hazha@...cinc.com>,
linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v5 03/10] dt-bindings: arm: Adds CoreSight TPDM hardware definitions
Hi,
On Tue, 12 Apr 2022 at 13:51, Mao Jinlong <quic_jinlmao@...cinc.com> wrote:
>
> Adds new coresight-tpdm.yaml file describing the bindings required
> to define tpdm in the device trees.
>
> Signed-off-by: Tao Zhang <quic_taozha@...cinc.com>
> Signed-off-by: Mao Jinlong <quic_jinlmao@...cinc.com>
> ---
> .../bindings/arm/coresight-tpdm.yaml | 99 +++++++++++++++++++
> .../devicetree/bindings/arm/coresight.txt | 7 ++
> MAINTAINERS | 1 +
> 3 files changed, 107 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/coresight-tpdm.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/coresight-tpdm.yaml
> new file mode 100644
> index 000000000000..05210e0fc262
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/coresight-tpdm.yaml
> @@ -0,0 +1,99 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/coresight-tpdm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Trace, Profiling and Diagnostics Monitor - TPDM
> +
> +description: |
> + The TPDM or Monitor serves as data collection component for various dataset
> + types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),
> + Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
> + Single Bit (DSB). It performs data collection in the data producing clock
> + domain and transfers it to the data collection time domain, generally ATB
> + clock domain.
> +
> + The primary use case of the TPDM is to collect data from different data
> + sources and send it to a TPDA for packetization, timestamping, and funneling.
> +
> +maintainers:
> + - Suzuki K Poulose <suzuki.poulose@....com>
> + - Mathieu Poirier <mathieu.poirier@...aro.org>
> +
These should be e-mail addresses of maintainers for this binding, not
the coresight sub-system.
See writing-schema.rst
> +properties:
> + $nodename:
> + pattern: "^tpdm(@[0-9a-f]+)$"
> + compatible:
> + items:
> + - const: qcom,coresight-tpdm
> + - const: arm,primecell
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: apb_pclk
> +
> + out-ports:
> + description: |
> + Output connections from the TPDM to coresight funnle/tpda.
> + $ref: /schemas/graph.yaml#/properties/ports
> + properties:
> + port:
> + description: Output connection from the TPDM to coresight
> + funnel/tpda.
> + $ref: /schemas/graph.yaml#/properties/port
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> + # minimum TPDM definition. TPDM connect to coresight funnel.
> + - |
> + tpdm@...0000 {
> + compatible = "qcom,coresight-tpdm", "arm,primecell";
> + reg = <0x6980000 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + tpdm_turing_out_funnel_turing: endpoint {
> + remote-endpoint =
> + <&funnel_turing_in_tpdm_turing>;
> + };
> + };
> + };
> + };
> + # minimum TPDM definition. TPDM connect to coresight TPDA.
> + - |
> + tpdm@...c000 {
> + compatible = "qcom,coresight-tpdm", "arm,primecell";
> + reg = <0x684c000 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + tpdm_prng_out_tpda_qdss: endpoint {
> + remote-endpoint =
> + <&tpda_qdss_in_tpdm_prng>;
> + };
> + };
> + };
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
> index c68d93a35b6c..f7ce8af48574 100644
> --- a/Documentation/devicetree/bindings/arm/coresight.txt
> +++ b/Documentation/devicetree/bindings/arm/coresight.txt
> @@ -52,6 +52,10 @@ its hardware characteristcs.
> "arm,coresight-cti", "arm,primecell";
> See coresight-cti.yaml for full CTI definitions.
>
> + - Trace, Profiling and Diagnostics Monitor (TPDM):
> + "qcom,coresight-tpdm", "arm,primecell";
> + See coresight-tpdm.yaml for full TPDM definitions.
> +
> * reg: physical base address and length of the register
> set(s) of the component.
>
> @@ -82,6 +86,9 @@ its hardware characteristcs.
> * Required properties for Coresight Cross Trigger Interface (CTI)
> See coresight-cti.yaml for full CTI definitions.
>
> +* Required properties for Trace, Profiling and Diagnostics Monitor (TPDM)
> + See coresight-tpdm.yaml for full TPDM definitions.
> +
> * Required properties for devices that don't show up on the AMBA bus, such as
> non-configurable replicators and non-configurable funnels:
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 61d9f114c37f..0d39bb37935d 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1977,6 +1977,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git
> F: Documentation/ABI/testing/sysfs-bus-coresight-devices-*
> F: Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
> F: Documentation/devicetree/bindings/arm/coresight-cti.yaml
> +F: Documentation/devicetree/bindings/arm/coresight-tpdm.yaml
> F: Documentation/devicetree/bindings/arm/coresight.txt
> F: Documentation/devicetree/bindings/arm/ete.yaml
> F: Documentation/devicetree/bindings/arm/trbe.yaml
> --
> 2.17.1
>
With the above:
Reviewed by: Mike Leach <mike.leach@...aro.org>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
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