[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1649924738-17990-6-git-send-email-kkartik@nvidia.com>
Date: Thu, 14 Apr 2022 13:55:37 +0530
From: Kartik <kkartik@...dia.com>
To: <daniel.lezcano@...aro.org>, <tglx@...utronix.de>,
<robh+dt@...nel.org>, <krzk+dt@...nel.org>,
<thierry.reding@...il.com>, <jonathanh@...dia.com>,
<spujar@...dia.com>, <akhilrajeev@...dia.com>,
<rgumasta@...dia.com>, <pshete@...dia.com>, <vidyas@...dia.com>,
<mperttunen@...dia.com>, <mkumard@...dia.com>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <kkartik@...dia.com>
Subject: [PATCH 5/6] arm64: tegra: Enable native timers on Tegra194
From: Thierry Reding <treding@...dia.com>
The native timers IP block found on NVIDIA Tegra SoCs implements a
watchdog timer that can be used to recover from system hangs. Add and
enable the device tree node on Tegra194.
Signed-off-by: Thierry Reding <treding@...dia.com>
Signed-off-by: Kartik <kkartik@...dia.com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 1d6be5774fac..fad2b1a634cb 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -649,6 +649,22 @@
};
};
+ timer@...0000 {
+ compatible = "nvidia,tegra186-timer";
+ reg = <0x03010000 0x000e0000>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ status = "okay";
+ };
+
uarta: serial@...0000 {
compatible = "nvidia,tegra194-uart", "nvidia,tegra20-uart";
reg = <0x03100000 0x40>;
--
2.17.1
Powered by blists - more mailing lists