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Message-ID: <373ad9c1.173d2.1802ba15993.Coremail.panqinglin2020@iscas.ac.cn>
Date: Fri, 15 Apr 2022 13:10:36 +0800 (GMT+08:00)
From: 潘庆霖 <panqinglin2020@...as.ac.cn>
To: "Anup Patel" <apatel@...tanamicro.com>
Cc: "Palmer Dabbelt" <palmer@...belt.com>,
"Paul Walmsley" <paul.walmsley@...ive.com>,
"Alexandre Ghiti" <alexandre.ghiti@...onical.com>,
"Atish Patra" <atishp@...shpatra.org>,
"Alistair Francis" <Alistair.Francis@....com>,
"Anup Patel" <anup@...infault.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
"linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>,
"Mayuresh Chitale" <mchitale@...tanamicro.com>
Subject: Re: Re: [PATCH] RISC-V: mm: Fix set_satp_mode() for platform not
having Sv57
Hi Anup,
>
> We can't assume that it will be the same pgd_index for Sv48 and Sv57.
>
> For example, some hypothetical SoC might have RAM starting after 1TB space.
>
> We should ensure that early_pg_dir is cleaned entirely for detecting the next
> mode.
>
Got it. Your idea is really more stable. Thank you for pointing out that!
Yours,
Qinglin
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