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Message-ID: <0b3356c0-b4c8-91ed-dfde-9f50483ec36f@i2se.com>
Date:   Fri, 15 Apr 2022 10:52:13 +0200
From:   Stefan Wahren <stefan.wahren@...e.com>
To:     "Ivan T. Ivanov" <iivanov@...e.de>
Cc:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Nicolas Saenz Julienne <nsaenz@...nel.org>,
        Florian Fainelli <f.fainelli@...il.com>,
        Ray Jui <rjui@...adcom.com>,
        Scott Branden <sbranden@...adcom.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Phil Elwell <phil@...pberrypi.org>,
        kernel test robot <lkp@...el.com>,
        bcm-kernel-feedback-list@...adcom.com, linux-clk@...r.kernel.org,
        linux-rpi-kernel@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] clk: bcm2835: Round UART input clock up

Hi Ivan,

Am 14.04.22 um 12:56 schrieb Ivan T. Ivanov:
> Hi Stefan,
>
> Please, could you take a look into following patch?
yes, but i cannot give a technical review. But from my gut feeling this 
doesn't look really elegant to me.
>
> Thanks!
> Ivan
>
> On 04-04 15:51, Ivan T. Ivanov wrote:
>> Subject: [PATCH v2] clk: bcm2835: Round UART input clock up
>> Message-Id: <20220404125113.80239-1-iivanov@...e.de>
>>
>> The UART clock is initialised to be as close to the requested
>> frequency as possible without exceeding it. Now that there is a
>> clock manager that returns the actual frequencies, an expected
>> 48MHz clock is reported as 47999625. If the requested baudrate
>> == requested clock/16, there is no headroom and the slight
>> reduction in actual clock rate results in failure.
>>
>> If increasing a clock by less than 0.1% changes it from ..999..
>> to ..000.., round it up.

Based on this commit message this looks like a fix / workaround for an 
issue. It would be very helpful to know:

What issue should be fixed?

Why is it fixed here and not in the UART driver for instance?

In case it fixes a regression, a Fixes tag should be necessary.

In best case this is explained in the commit message.

Best regards

>>
>> This is reworked version of a downstream fix:
>> https://github.com/raspberrypi/linux/commit/ab3f1b39537f6d3825b8873006fbe2fc5ff057b7
>>
>> Cc: Phil Elwell <phil@...pberrypi.org>
>> Signed-off-by: Ivan T. Ivanov <iivanov@...e.de>
>> ---
>> Changes since v1
>> Make bcm2835_clock_round() static to fix following warning
>> when compiling for riscv:
>> drivers/clk/bcm/clk-bcm2835.c:997:15: warning: no previous prototype for 'bcm2835_clock_round' [-Wmissing-prototypes]
>> Reported-by: kernel test robot <lkp@...el.com>
>>
>>   drivers/clk/bcm/clk-bcm2835.c | 30 ++++++++++++++++++++++++++++--
>>   1 file changed, 28 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
>> index 3ad20e75fd23..c29b643d1bf5 100644
>> --- a/drivers/clk/bcm/clk-bcm2835.c
>> +++ b/drivers/clk/bcm/clk-bcm2835.c
>> @@ -502,6 +502,8 @@ struct bcm2835_clock_data {
>>   	bool low_jitter;
>>   
>>   	u32 tcnt_mux;
>> +
>> +	bool round_up;
>>   };
>>   
>>   struct bcm2835_gate_data {
>> @@ -992,12 +994,30 @@ static long bcm2835_clock_rate_from_divisor(struct bcm2835_clock *clock,
>>   	return temp;
>>   }
>>   
>> +static unsigned long bcm2835_clock_round(unsigned long clk)
>> +{
>> +	unsigned long scaler;
>> +
>> +	/*
>> +	 * If increasing a clock by less than 0.1% changes it
>> +	 * from ..999.. to ..000.., round up.
>> +	 */
>> +	scaler = 1;
>> +	while (scaler * 100000 < clk)
>> +		scaler *= 10;
>> +	if ((clk + scaler - 1) / scaler % 1000 == 0)
>> +		clk = (clk / scaler + 1) * scaler;
>> +
>> +	return clk;
>> +}
>> +
>>   static unsigned long bcm2835_clock_get_rate(struct clk_hw *hw,
>>   					    unsigned long parent_rate)
>>   {
>>   	struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
>>   	struct bcm2835_cprman *cprman = clock->cprman;
>>   	const struct bcm2835_clock_data *data = clock->data;
>> +	unsigned long rate;
>>   	u32 div;
>>   
>>   	if (data->int_bits == 0 && data->frac_bits == 0)
>> @@ -1005,7 +1025,12 @@ static unsigned long bcm2835_clock_get_rate(struct clk_hw *hw,
>>   
>>   	div = cprman_read(cprman, data->div_reg);
>>   
>> -	return bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
>> +	rate = bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
>> +
>> +	if (data->round_up)
>> +		rate = bcm2835_clock_round(rate);
>> +
>> +	return rate;
>>   }
>>   
>>   static void bcm2835_clock_wait_busy(struct bcm2835_clock *clock)
>> @@ -2142,7 +2167,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
>>   		.div_reg = CM_UARTDIV,
>>   		.int_bits = 10,
>>   		.frac_bits = 12,
>> -		.tcnt_mux = 28),
>> +		.tcnt_mux = 28,
>> +		.round_up = true),
>>   
>>   	/* TV encoder clock.  Only operating frequency is 108Mhz.  */
>>   	[BCM2835_CLOCK_VEC]	= REGISTER_PER_CLK(
>> -- 
>> 2.26.2

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