lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 15 Apr 2022 11:44:10 -0700
From:   Anjelique Melendez <quic_amelende@...cinc.com>
To:     Rob Herring <robh@...nel.org>
CC:     <dmitry.torokhov@...il.com>, <corbet@....net>, <sre@...nel.org>,
        <linux-input@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-msm@...r.kernel.org>, <collinsd@...eaurora.org>,
        <bjorn.andersson@...aro.org>, <swboyd@...omium.org>,
        <skakit@...eaurora.org>, <linux-doc@...r.kernel.org>,
        <linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        David Collins <quic_collinsd@...cinc.com>
Subject: Re: [PATCH v5 1/5] dt-bindings: power: reset: qcom-pon: update "reg"
 property details



On 4/14/2022 8:34 AM, Rob Herring wrote:
> On Mon, Apr 11, 2022 at 01:05:03PM -0700, Anjelique Melendez wrote:
>> From: David Collins <quic_collinsd@...cinc.com>
>>
>> Update the description of "reg" property to add the PON_PBS base
>> address along with PON_HLOS base address.  Also add "reg-names"
>> property description.
>>
>> Signed-off-by: David Collins <quic_collinsd@...cinc.com>
>> Signed-off-by: Anjelique Melendez <quic_amelende@...cinc.com>
>> ---
>>  .../bindings/power/reset/qcom,pon.yaml | 20 +++++++++++++++++++-
>>  1 file changed, 19 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml b/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml
>> index 353f155d..542200b2 100644
>> --- a/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml
>> +++ b/Documentation/bindings/power/reset/qcom,pon.yaml
>> @@ -26,7 +26,25 @@ properties:
>>        - qcom,pm8998-pon
>>  
>>    reg:
>> -    maxItems: 1
>> +    description: |
>> +      Specifies the SPMI base address for the PON (power-on) peripheral.  For
>> +      PMICs that have the PON peripheral (GEN3) split into PON_HLOS and PON_PBS
>> +      (e.g. PMK8350), this can hold addresses of both PON_HLOS and PON_PBS
>> +      peripherals.  In that case, the PON_PBS address needs to be specified to
>> +      facilitate software debouncing on some PMICs.
>> +    minItems: 1
>> +    maxItems: 2
>> +
>> +  reg-names:
>> +    description: |
>> +      For PON GEN1 and GEN2, it should be "pon".  For PON GEN3 it should include
>> +      "pon_hlos" and optionally "pon_pbs".
>> +    minItems: 1
>> +    maxItems: 2
>> +    items:
>> +      - const: pon_hlos
>> +      - const: pon_pbs
>> +      - const: pon
> 
> This says there are 3 entries, but you limited to 2. The schema also 
> doesn't match what the description says. Entries should be extended by 
> adding new entries to the end and keeping optional entries last. So like 
> this:
> 
> minItems: 1
> items:
>   - const: pon
>   - const: pon_hlos
>   - const: pon_pbs
> 
> RobWill update in next patch. Thanks

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ