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Message-Id: <20220416123049.879969-1-baolu.lu@linux.intel.com>
Date:   Sat, 16 Apr 2022 20:30:46 +0800
From:   Lu Baolu <baolu.lu@...ux.intel.com>
To:     Jacob jun Pan <jacob.jun.pan@...el.com>,
        Kevin Tian <kevin.tian@...el.com>,
        Ashok Raj <ashok.raj@...el.com>, Liu Yi L <yi.l.liu@...el.com>
Cc:     iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
        Lu Baolu <baolu.lu@...ux.intel.com>
Subject: [PATCH 0/3] iommu/vt-d: Some fine tuning of SVA

Hi folks,

This includes several tunings of Intel SVA implementation. I plan to
target them for v5.19. Please help to review.

Best regards,
baolu


Lu Baolu (3):
  iommu/vt-d: Set PGSNP bit in pasid table entry for sva binding
  iommu/vt-d: Drop stop marker messages
  iommu/vt-d: Size Page Request Queue to avoid overflow condition

 include/linux/intel-svm.h   | 2 +-
 drivers/iommu/intel/pasid.c | 2 +-
 drivers/iommu/intel/svm.c   | 5 +++++
 3 files changed, 7 insertions(+), 2 deletions(-)

-- 
2.25.1

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