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Message-ID: <CACRpkdbrw7Hjt9mB9pr_iNsGi71g_d8BGhpT_ih1RVgKJ5U0qQ@mail.gmail.com>
Date:   Mon, 18 Apr 2022 01:41:30 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Michael Walle <michael@...le.cc>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        Lars Povlsen <lars.povlsen@...rochip.com>,
        Steen Hegelund <Steen.Hegelund@...rochip.com>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Gregory CLEMENT <gregory.clement@...tlin.com>,
        Paul Burton <paulburton@...nel.org>,
        Quentin Schulz <quentin.schulz@...tlin.com>,
        Antoine Tenart <atenart@...nel.org>,
        Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>,
        "David S . Miller" <davem@...emloft.net>,
        UNGLinuxDriver@...rochip.com, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-mips@...r.kernel.org
Subject: Re: [PATCH v3 6/6] dt-bindings: pinctrl: convert ocelot-pinctrl to
 YAML format

On Sat, Mar 19, 2022 at 9:47 PM Michael Walle <michael@...le.cc> wrote:

> Convert the ocelot-pinctrl device tree binding to the new YAML format.
>
> Additionally to the original binding documentation, add interrupt
> properties which are optional and already used on several SoCs like
> SparX-5, Luton, Ocelot and LAN966x but were not documented before.
>
> Also, on the sparx5 and the lan966x SoCs there are two items for the
> reg property.
>
> Signed-off-by: Michael Walle <michael@...le.cc>

So is this single patch something I should apply to the pin control tree?
If you want to merge it all through ARM SoC go ahead:
Acked-by: Linus Walleij <linus.walleij@...aro.org>

Yours,
Linus Walleij

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