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Message-ID: <BN9PR11MB5276A47E4013FA692C7560D58CF39@BN9PR11MB5276.namprd11.prod.outlook.com>
Date: Mon, 18 Apr 2022 06:56:23 +0000
From: "Tian, Kevin" <kevin.tian@...el.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>,
"Pan, Jacob jun" <jacob.jun.pan@...el.com>,
"Raj, Ashok" <ashok.raj@...el.com>,
"Liu, Yi L" <yi.l.liu@...el.com>
CC: "iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 1/3] iommu/vt-d: Set PGSNP bit in pasid table entry for
sva binding
> From: Lu Baolu <baolu.lu@...ux.intel.com>
> Sent: Saturday, April 16, 2022 8:31 PM
>
> This field make the requests snoop processor caches irrespective of other
> attributes in the request or other fields in paging structure entries
> used to translate the request. The latest VT-d specification states that
> this field is treated as Reserved(0) for implementations not supporting
> Snoop Control (SC=0 in the Extended Capability Register). Hence add a
> check in the code.
>
> Signed-off-by: Lu Baolu <baolu.lu@...ux.intel.com>
> ---
> drivers/iommu/intel/pasid.c | 2 +-
> drivers/iommu/intel/svm.c | 1 +
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
> index f8d215d85695..9ca3c67a2058 100644
> --- a/drivers/iommu/intel/pasid.c
> +++ b/drivers/iommu/intel/pasid.c
> @@ -625,7 +625,7 @@ int intel_pasid_setup_first_level(struct intel_iommu
> *iommu,
> }
> }
>
> - if (flags & PASID_FLAG_PAGE_SNOOP)
> + if ((flags & PASID_FLAG_PAGE_SNOOP) && ecap_sc_support(iommu-
> >ecap))
> pasid_set_pgsnp(pte);
If the caller wants snoop for some reason is it correct to simply
ignore the request when lacking of hw support? Suppose certain
errno should be returned here...
>
> pasid_set_domain_id(pte, did);
> diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
> index 23a38763c1d1..d88af37c20ef 100644
> --- a/drivers/iommu/intel/svm.c
> +++ b/drivers/iommu/intel/svm.c
> @@ -394,6 +394,7 @@ static struct iommu_sva *intel_svm_bind_mm(struct
> intel_iommu *iommu,
> sflags = (flags & SVM_FLAG_SUPERVISOR_MODE) ?
> PASID_FLAG_SUPERVISOR_MODE : 0;
> sflags |= cpu_feature_enabled(X86_FEATURE_LA57) ?
> PASID_FLAG_FL5LP : 0;
> + sflags |= PASID_FLAG_PAGE_SNOOP;
> spin_lock_irqsave(&iommu->lock, iflags);
> ret = intel_pasid_setup_first_level(iommu, dev, mm->pgd, mm-
> >pasid,
> FLPT_DEFAULT_DID, sflags);
> --
> 2.25.1
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