linux-kernel - Re: [PATCH v4 1/5] serial: 8250: Correct the clock for EndRun PTP/1588 PCIe device

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAHp75VdTzd56DzWsjf9GW3zfCtYh4ej3U6KTS7j3aXSVkWOOig@mail.gmail.com>
Date:   Mon, 18 Apr 2022 15:13:44 +0300
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     "Maciej W. Rozycki" <macro@...am.me.uk>
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jiri Slaby <jirislaby@...nel.org>,
        "open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 1/5] serial: 8250: Correct the clock for EndRun
 PTP/1588 PCIe device

On Mon, Apr 18, 2022 at 2:02 AM Maciej W. Rozycki <macro@...am.me.uk> wrote:
>
> The EndRun PTP/1588 dual serial port device is based on the Oxford
> Semiconductor OXPCIe952 UART device with the PCI vendor:device ID set
> for EndRun Technologies and is therefore driven by a fixed 62.5MHz clock
> input derived from the 100MHz PCI Express clock.  The clock rate is
> divided by the oversampling rate of 16 as it is supplied to the baud
> rate generator, yielding the baud base of 3906250.
>
> Replace the incorrect baud base of 4000000 with the right value of
> 3906250 then, complementing commit 6cbe45d8ac93 ("serial: 8250: Correct
> the clock for OxSemi PCIe devices").

Reviewed-by: Andy Shevchenko <andy.shevchenko@...il.com>

> Signed-off-by: Maciej W. Rozycki <macro@...am.me.uk>
> Fixes: 1bc8cde46a159 ("8250_pci: Added driver for Endrun Technologies PTP PCIe card.")
> ---
> New change in v4, factored out from 2/5.
> ---
>  drivers/tty/serial/8250/8250_pci.c |    8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> linux-serial-8250-endrun-pcie-clock.diff
> Index: linux-macro/drivers/tty/serial/8250/8250_pci.c
> ===================================================================
> --- linux-macro.orig/drivers/tty/serial/8250/8250_pci.c
> +++ linux-macro/drivers/tty/serial/8250/8250_pci.c
> @@ -2667,7 +2667,7 @@ enum pci_board_num_t {
>         pbn_panacom2,
>         pbn_panacom4,
>         pbn_plx_romulus,
> -       pbn_endrun_2_4000000,
> +       pbn_endrun_2_3906250,
>         pbn_oxsemi,
>         pbn_oxsemi_1_3906250,
>         pbn_oxsemi_2_3906250,
> @@ -3195,10 +3195,10 @@ static struct pciserial_board pci_boards
>         * signal now many ports are available
>         * 2 port 952 Uart support
>         */
> -       [pbn_endrun_2_4000000] = {
> +       [pbn_endrun_2_3906250] = {
>                 .flags          = FL_BASE0,
>                 .num_ports      = 2,
> -               .base_baud      = 4000000,
> +               .base_baud      = 3906250,
>                 .uart_offset    = 0x200,
>                 .first_offset   = 0x1000,
>         },
> @@ -4128,7 +4128,7 @@ static const struct pci_device_id serial
>         */
>         {       PCI_VENDOR_ID_ENDRUN, PCI_DEVICE_ID_ENDRUN_1588,
>                 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
> -               pbn_endrun_2_4000000 },
> +               pbn_endrun_2_3906250 },
>         /*
>          * Quatech cards. These actually have configurable clocks but for
>          * now we just use the default.



-- 
With Best Regards,
Andy Shevchenko