linux-kernel - RE: [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support

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Message-ID: <AS8PR04MB86762A33F301071ACC2C0CF88CF39@AS8PR04MB8676.eurprd04.prod.outlook.com>
Date:   Mon, 18 Apr 2022 04:54:32 +0000
From:   Hongxing Zhu <hongxing.zhu@....com>
To:     Lucas Stach <l.stach@...gutronix.de>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "robh@...nel.org" <robh@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "vkoul@...nel.org" <vkoul@...nel.org>,
        "alexander.stein@...tq-group.com" <alexander.stein@...tq-group.com>
CC:     "linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support

> -----Original Message-----
> From: Lucas Stach <l.stach@...gutronix.de>
> Sent: 2022年4月15日 4:48
> To: Hongxing Zhu <hongxing.zhu@....com>; p.zabel@...gutronix.de;
> bhelgaas@...gle.com; lorenzo.pieralisi@....com; robh@...nel.org;
> shawnguo@...nel.org; vkoul@...nel.org; alexander.stein@...tq-group.com
> Cc: linux-phy@...ts.infradead.org; devicetree@...r.kernel.org;
> linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linux-kernel@...r.kernel.org; kernel@...gutronix.de; dl-linux-imx
> <linux-imx@....com>
> Subject: Re: [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST
> support
> 
> Am Montag, dem 07.03.2022 um 17:07 +0800 schrieb Richard Zhu:
> > Add the i.MX8MP PCIe PHY PERST support.
> 
> As Philipp said: please add some more description on why this is necessary. As
> far as I can see the reset is already present on 8MQ, and is low-active, like this
> patch claims. We just didn't handle this reset at all on other SoCs as the power
> on de-asserted state was okay to get things working.
>
Yes, it is.
I had asking the details from design team.
Would update the description after I get the more information.

Best Regards
Richard Zhu

> Regards,
> Lucas
> 
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > ---
> >  drivers/reset/reset-imx7.c | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
> > index 185a333df66c..d2408725eb2c 100644
> > --- a/drivers/reset/reset-imx7.c
> > +++ b/drivers/reset/reset-imx7.c
> > @@ -329,6 +329,7 @@ static int imx8mp_reset_set(struct
> reset_controller_dev *rcdev,
> >  		break;
> >
> >  	case IMX8MP_RESET_PCIE_CTRL_APPS_EN:
> > +	case IMX8MP_RESET_PCIEPHY_PERST:
> >  		value = assert ? 0 : bit;
> >  		break;
> >  	}
>