lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220419110328.0241fb1f@fixe.home>
Date:   Tue, 19 Apr 2022 11:03:28 +0200
From:   Clément Léger <clement.leger@...tlin.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Herve Codina <herve.codina@...tlin.com>,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        Milan Stevanovic <milan.stevanovic@...com>,
        Jimmy Lalande <jimmy.lalande@...com>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH net-next 09/12] ARM: dts: r9a06g032: describe MII
 converter

Le Sat, 16 Apr 2022 15:48:51 +0200,
Andrew Lunn <andrew@...n.ch> a écrit :

> On Fri, Apr 15, 2022 at 06:45:41PM +0200, Clément Léger wrote:
> > Le Fri, 15 Apr 2022 18:19:46 +0200,
> > Andrew Lunn <andrew@...n.ch> a écrit :
> >   
> > > > I think it would be good to modify it like this:
> > > > 
> > > > eth-miic@...30000 {
> > > >     ...
> > > >   converters {
> > > >     mii_conv0: mii-conv@0 {
> > > >       // Even if useless, maybe keeping it for the sake of coherency
> > > >       renesas,miic-input = <MIIC_GMAC1>;
> > > >       reg = <0>;
> > > >     };    
> > > 
> > > This is not a 'bus', so using reg, and @0, etc is i think wrong.  You
> > > just have a collection of properties.  
> > 
> > Agreed, but this is the same thing that is done for DSA ports (at least
> > I think). It uses reg which describe the port number, this is not a
> > real bus per se, it only refer to port indices.  
> 
> True. That is an old binding, before a lot of good practices were
> enforced. I'm not sure it would be accepted today.
> 
> I suggest you make a proposal and see what the DT Maintainers say.

Acked.

> 
> > But if you think this should not be done like this, what do you
> > propose then ? These nodes are also reference from "pcs-handle"
> > properties in switch to retrieve the PCS.  
> 
> This i was not thinking about. Make this clear in the binding
> documentation for what you propose.
> 
> Humm, this last point just gave me an idea. How are you representing
> the PCS in DT? Are they memory mapped? So you have a nodes something
> like:
> 
> eth-pcs-conv1@...40100 {
> 	compatible = "acm-inc,pcs"
> }
> 
> eth-pcs-conv2@...40200 {
> 	compatible = "acm-inc,pcs"
> }

That is a good idea since the converter are indeed (partly) memory
mapped, but the hardware guys decided that it was a good idea to share
some registers. Amongst shared registers, we have the reset for each
converter and the muxing control which as stated before is contained in
a single register.

> 
> The MAC node than has a pcs-handle pointing to one of these nodes?
> 
> You implicitly have the information you need to configure the MII
> muxes here. The information is a lot more distributed, but it is
> there. As each MAC probes, it can ask the MII MUX driver to connect
> its MAC to the converter pointed to by its pcs-handle.

Hum, that could be done but since only some values/combinations are
allowed, it would potentially require to validate the setting at each
request, leading to potential non working devices due to invalid MUX
configuration required. I think the fact that we could have everything
in one single node allows to validate it at probe time.

Anyway, I'll make a proposal an we'll see ! Thanks again for your
feedback.

-- 
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ