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Message-Id: <20220420194600.3416282-1-michael@walle.cc>
Date: Wed, 20 Apr 2022 21:46:00 +0200
From: Michael Walle <michael@...le.cc>
To: Lars Povlsen <lars.povlsen@...rochip.com>,
Steen Hegelund <Steen.Hegelund@...rochip.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
UNGLinuxDriver@...rochip.com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Michael Walle <michael@...le.cc>
Subject: [PATCH] arm64: dts: sparx5: rename pinctrl nodes
The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@...le.cc>
---
The YAML conversion patch is alread in
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=devel
.../dts/microchip/sparx5_pcb134_board.dtsi | 26 +++++++++----------
.../dts/microchip/sparx5_pcb135_board.dtsi | 10 +++----
2 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
index 33faf1f3264f..6f488e774215 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
@@ -325,69 +325,69 @@ &sgpio2 {
};
&gpio {
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_16", "GPIO_17", "GPIO_18", "GPIO_19",
"GPIO_20", "GPIO_22", "GPIO_36", "GPIO_35",
"GPIO_50", "GPIO_51", "GPIO_56", "GPIO_57";
function = "twi_scl_m";
output-low;
};
- i2cmux_0: i2cmux-0 {
+ i2cmux_0: i2cmux-0-pins {
pins = "GPIO_16";
function = "twi_scl_m";
output-high;
};
- i2cmux_1: i2cmux-1 {
+ i2cmux_1: i2cmux-1-pins {
pins = "GPIO_17";
function = "twi_scl_m";
output-high;
};
- i2cmux_2: i2cmux-2 {
+ i2cmux_2: i2cmux-2-pins {
pins = "GPIO_18";
function = "twi_scl_m";
output-high;
};
- i2cmux_3: i2cmux-3 {
+ i2cmux_3: i2cmux-3-pins {
pins = "GPIO_19";
function = "twi_scl_m";
output-high;
};
- i2cmux_4: i2cmux-4 {
+ i2cmux_4: i2cmux-4-pins {
pins = "GPIO_20";
function = "twi_scl_m";
output-high;
};
- i2cmux_5: i2cmux-5 {
+ i2cmux_5: i2cmux-5-pins {
pins = "GPIO_22";
function = "twi_scl_m";
output-high;
};
- i2cmux_6: i2cmux-6 {
+ i2cmux_6: i2cmux-6-pins {
pins = "GPIO_36";
function = "twi_scl_m";
output-high;
};
- i2cmux_7: i2cmux-7 {
+ i2cmux_7: i2cmux-7-pins {
pins = "GPIO_35";
function = "twi_scl_m";
output-high;
};
- i2cmux_8: i2cmux-8 {
+ i2cmux_8: i2cmux-8-pins {
pins = "GPIO_50";
function = "twi_scl_m";
output-high;
};
- i2cmux_9: i2cmux-9 {
+ i2cmux_9: i2cmux-9-pins {
pins = "GPIO_51";
function = "twi_scl_m";
output-high;
};
- i2cmux_10: i2cmux-10 {
+ i2cmux_10: i2cmux-10-pins {
pins = "GPIO_56";
function = "twi_scl_m";
output-high;
};
- i2cmux_11: i2cmux-11 {
+ i2cmux_11: i2cmux-11-pins {
pins = "GPIO_57";
function = "twi_scl_m";
output-high;
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
index ef96e6d8c6b3..d9e519bfbf68 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
@@ -59,28 +59,28 @@ led@7 {
};
&gpio {
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_35", "GPIO_36",
"GPIO_50", "GPIO_51";
function = "twi_scl_m";
output-low;
};
- i2cmux_s29: i2cmux-0 {
+ i2cmux_s29: i2cmux-0-pins {
pins = "GPIO_35";
function = "twi_scl_m";
output-high;
};
- i2cmux_s30: i2cmux-1 {
+ i2cmux_s30: i2cmux-1-pins {
pins = "GPIO_36";
function = "twi_scl_m";
output-high;
};
- i2cmux_s31: i2cmux-2 {
+ i2cmux_s31: i2cmux-2-pins {
pins = "GPIO_50";
function = "twi_scl_m";
output-high;
};
- i2cmux_s32: i2cmux-3 {
+ i2cmux_s32: i2cmux-3-pins {
pins = "GPIO_51";
function = "twi_scl_m";
output-high;
--
2.30.2
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