linux-kernel - [PATCH V2 00/12] Cleanup MediaTek clk reset drivers and support MT8192/MT8195

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <20220420130527.23200-1-rex-bc.chen@mediatek.com>
Date:   Wed, 20 Apr 2022 21:05:15 +0800
From:   Rex-BC Chen <rex-bc.chen@...iatek.com>
To:     <mturquette@...libre.com>, <sboyd@...nel.org>
CC:     <matthias.bgg@...il.com>, <p.zabel@...gutronix.de>,
        <angelogioacchino.delregno@...labora.com>,
        <chun-jie.chen@...iatek.com>, <wenst@...omium.org>,
        <runyang.chen@...iatek.com>, <linux-kernel@...r.kernel.org>,
        <allen-kh.cheng@...iatek.com>, <linux-clk@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        Rex-BC Chen <rex-bc.chen@...iatek.com>
Subject: [PATCH V2 00/12] Cleanup MediaTek clk reset drivers and support MT8192/MT8195

In this series, we cleanup MediaTek clock reset drivers in clk/mediatek
folder. MediaTek clock reset driver is used to provide reset control
of modules controlled in clk, like infra_ao.

Changes for V2:
1. Modify drivers for reviewers' comments.
2. Use simple reset to replace v1.
3. Recover v2 to set_clr.
4. Separate error handling to another patch.
5. Add support for input offset and bit from DT.
6. Add support for MT8192 and MT8195.

Rex-BC Chen (12):
  clk: mediatek: reset: Fix written reset bit offset
  clk: mediatek: reset: Use simple reset operations
  clk: mediatek: reset: Refine functions of set_clr
  clk: mediatek: reset: Merge and revise reset register function
  clk: mediatek: reset: Add reset.h
  clk: mediatek: reset: Revise structure to control reset register
  clk: mediatek: reset: Add return for clock reset register function
  clk: mediatek: reset: Add new register reset function with device
  clk: mediatek: reset: Add support for input offset and bit from DT
  clk: mediatek: reset: Add reset support for simple probe
  clk: mediatek: reset: Add infra_ao reset support for MT8192
  clk: mediatek: reset: Add infra_ao reset support for MT8195

 drivers/clk/mediatek/Kconfig               |   1 +
 drivers/clk/mediatek/clk-mt2701-eth.c      |   8 +-
 drivers/clk/mediatek/clk-mt2701-g3d.c      |   8 +-
 drivers/clk/mediatek/clk-mt2701-hif.c      |   8 +-
 drivers/clk/mediatek/clk-mt2701.c          |  19 ++-
 drivers/clk/mediatek/clk-mt2712.c          |  19 ++-
 drivers/clk/mediatek/clk-mt7622-eth.c      |   8 +-
 drivers/clk/mediatek/clk-mt7622-hif.c      |  10 +-
 drivers/clk/mediatek/clk-mt7622.c          |  19 ++-
 drivers/clk/mediatek/clk-mt7629-eth.c      |   8 +-
 drivers/clk/mediatek/clk-mt7629-hif.c      |  10 +-
 drivers/clk/mediatek/clk-mt8135.c          |  19 ++-
 drivers/clk/mediatek/clk-mt8173.c          |  19 ++-
 drivers/clk/mediatek/clk-mt8183.c          |   8 +-
 drivers/clk/mediatek/clk-mt8192.c          |  11 ++
 drivers/clk/mediatek/clk-mt8195-infra_ao.c |   8 +
 drivers/clk/mediatek/clk-mtk.c             |   7 +
 drivers/clk/mediatek/clk-mtk.h             |   9 +-
 drivers/clk/mediatek/reset.c               | 175 +++++++++++++--------
 drivers/clk/mediatek/reset.h               |  36 +++++
 include/dt-bindings/reset/mt8192-resets.h  |  11 ++
 include/dt-bindings/reset/mt8195-resets.h  |   7 +
 22 files changed, 333 insertions(+), 95 deletions(-)
 create mode 100644 drivers/clk/mediatek/reset.h

-- 
2.18.0