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Date: Wed, 20 Apr 2022 22:44:12 +0800
From: guoren@...nel.org
To: guoren@...nel.org, arnd@...db.de, palmer@...belt.com,
mark.rutland@....com, will@...nel.org, peterz@...radead.org,
boqun.feng@...il.com, dlustig@...dia.com, parri.andrea@...il.com
Cc: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: [PATCH V3 0/5] riscv: atomic: Optimize AMO instructions usage
From: Guo Ren <guoren@...ux.alibaba.com>
These patch series contain one cleanup and some optimizations for
atomic operations.
Changes in V3:
- Fixup usage of lr.rl & sc.aq with violation of ISA
- Add Optimize dec_if_positive functions
- Add conditional atomic operations' optimization
Changes in V2:
- Fixup LR/SC memory barrier semantic problems which pointed by
Rutland
- Combine patches into one patchset series
- Separate AMO optimization & LRSC optimization for convenience
patch review
Guo Ren (5):
riscv: atomic: Cleanup unnecessary definition
riscv: atomic: Optimize acquire and release for AMO operations
riscv: atomic: Optimize memory barrier semantics of LRSC-pairs
riscv: atomic: Optimize dec_if_positive functions
riscv: atomic: Add conditional atomic operations' optimization
arch/riscv/include/asm/atomic.h | 168 ++++++++++++++++++++++++++++---
arch/riscv/include/asm/cmpxchg.h | 30 ++----
2 files changed, 160 insertions(+), 38 deletions(-)
--
2.25.1
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