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Message-Id: <20220421153115.3496834-1-michael@walle.cc>
Date: Thu, 21 Apr 2022 17:31:15 +0200
From: Michael Walle <michael@...le.cc>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Li Yang <leoyang.li@....com>, Michael Walle <michael@...le.cc>,
Shawn Guo <shawnguo@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] dt-bindings: fsl: convert fsl,layerscape-scfg to YAML
Convert the fsl,layerscape-scfg binding to the new YAML format.
Added, compared to the original binding, is the interrupt-controller
subnode as used in arch/arm/boot/dts/ls1021a.dtsi as well as the
litte-endian and big-endian properties.
Signed-off-by: Michael Walle <michael@...le.cc>
---
.../arm/freescale/fsl,layerscape-scfg.txt | 19 ------
.../arm/freescale/fsl,layerscape-scfg.yaml | 58 +++++++++++++++++++
2 files changed, 58 insertions(+), 19 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.yaml
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
deleted file mode 100644
index 0ab67b0b216d..000000000000
--- a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-Freescale SCFG
-
-SCFG is the supplemental configuration unit, that provides SoC specific
-configuration and status registers for the chip. Such as getting PEX port
-status.
-
-Required properties:
- - compatible: Should contain a chip-specific compatible string,
- Chip-specific strings are of the form "fsl,<chip>-scfg",
- The following <chip>s are known to be supported:
- ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
-
- - reg: should contain base address and length of SCFG memory-mapped registers
-
-Example:
- scfg: scfg@...0000 {
- compatible = "fsl,ls1021a-scfg";
- reg = <0x0 0x1570000 0x0 0x10000>;
- };
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.yaml
new file mode 100644
index 000000000000..b68a9bc68860
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,layerscape-scfg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Layerscape Supplemental Configuration Unit
+
+maintainers:
+ - Shawn Guo <shawnguo@...nel.org>
+ - Li Yang <leoyang.li@....com>
+
+description: |
+ SCFG is the supplemental configuration unit, that provides SoC specific
+ configuration and status registers for the chip. Such as getting PEX port
+ status.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - fsl,ls1012a-scfg
+ - fsl,ls1021a-scfg
+ - fsl,ls1028a-scfg
+ - fsl,ls1043a-scfg
+ - fsl,ls1046a-scfg
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ little-endian: true
+ big-endian: true
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+ ranges: true
+
+patternProperties:
+ "^interrupt-controller@[a-z0-9]+$":
+ $ref: /schemas/interrupt-controller.yaml#
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ scfg@...0000 {
+ compatible = "fsl,ls1021a-scfg", "syscon";
+ reg = <0x1570000 0x10000>;
+ };
--
2.30.2
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