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Message-ID: <YmGM35IjoEhNSdRD@google.com>
Date: Thu, 21 Apr 2022 09:57:03 -0700
From: Matthias Kaehlcke <mka@...omium.org>
To: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Cc: agross@...nel.org, bjorn.andersson@...aro.org, robh+dt@...nel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, quic_rohkumar@...cinc.com,
srinivas.kandagatla@...aro.org, dianders@...omium.org,
swboyd@...omium.org, judyhsiao@...omium.org,
Venkata Prasad Potturu <quic_potturu@...cinc.com>
Subject: Re: [PATCH v9 05/12] arm64: dts: qcom: sc7280: Add wcd9385 codec
node for CRD 3.0/3.1
On Thu, Apr 21, 2022 at 08:17:32PM +0530, Srinivasa Rao Mandadapu wrote:
> Add wcd9385 codec node for audio use case on CRD rev5 (aka CRD 3.0/3.1)
nit: rev5+
> boards. Add tlmm gpio property for switching CTIA/OMTP Headset.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@...cinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 52 +++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
> index d0794f2..d6a3086 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
> @@ -12,6 +12,36 @@
> / {
> model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";
> compatible = "google,hoglin", "qcom,sc7280";
> +
> + wcd938x: audio-codec-1 {
wcd9385 (same for the CRD <= 2.0, I missed it there).
> + compatible = "qcom,wcd9385-codec";
> + pinctrl-names = "default", "sleep", "us_euro_hs_sel";
> + pinctrl-0 = <&wcd_reset_n>;
> + pinctrl-1 = <&wcd_reset_n_sleep>;
> + pinctrl-2 = <&us_euro_hs_sel>;
This looks wrong, see my comment on the CRD <= 2.0 patch
(https://patchwork.kernel.org/project/linux-arm-msm/patch/1650552459-21077-5-git-send-email-quic_srivasam@quicinc.com/)
> +
> + reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
> + us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
> +
> + qcom,rx-device = <&wcd_rx>;
> + qcom,tx-device = <&wcd_tx>;
> +
> + vdd-rxtx-supply = <&vreg_l18b_1p8>;
> + vdd-io-supply = <&vreg_l18b_1p8>;
> + vdd-buck-supply = <&vreg_l17b_1p8>;
> + vdd-mic-bias-supply = <&vreg_bob>;
> +
> + qcom,micbias1-microvolt = <1800000>;
> + qcom,micbias2-microvolt = <1800000>;
> + qcom,micbias3-microvolt = <1800000>;
> + qcom,micbias4-microvolt = <1800000>;
> +
> + qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
> + 500000 500000 500000>;
> + qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
> + qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
> + #sound-dai-cells = <1>;
> + };
The wcd9385 is on the qcard, so I think this node should be added to
sc7280-qcard.dtsi and be marked as "disabled". This file can then just
set the status to "okay". Future boards that use the wcd could do the
same, rather than adding a copy of this node to their .dts file.
> };
>
> /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
> @@ -345,4 +375,26 @@ ap_ts_pen_1v8: &i2c13 {
> "",
> "",
> "";
> +
> + us_euro_hs_sel: us-euro-hs-sel {
> + pins = "gpio81";
> + function = "gpio";
> + bias-pull-down;
> + drive-strength = <2>;
> + };
> +
> + wcd_reset_n: wcd-reset-n {
> + pins = "gpio83";
> + function = "gpio";
> + drive-strength = <8>;
> + output-high;
> + };
> +
> + wcd_reset_n_sleep: wcd-reset-n-sleep {
> + pins = "gpio83";
> + function = "gpio";
> + drive-strength = <8>;
> + bias-disable;
> + output-low;
> + };
These are also on the qcard, please move the nodes to sc7280-qcard.dtsi
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