linux-kernel - Re: [PATCH 4/8] dt-bindings: nvmem: sfp: Add compatible binding for TA 2.1 SFPs

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Message-ID: <e05b5a9f-2049-73be-e9cc-9640eb014e01@seco.com>
Date:   Thu, 21 Apr 2022 14:47:59 -0400
From:   Sean Anderson <sean.anderson@...o.com>
To:     Michael Walle <michael@...le.cc>
Cc:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        Shawn Guo <shawnguo@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Li Yang <leoyang.li@....com>, linux-kernel@...r.kernel.org,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: Re: [PATCH 4/8] dt-bindings: nvmem: sfp: Add compatible binding for
 TA 2.1 SFPs



On 4/21/22 2:18 PM, Michael Walle wrote:
> Am 2022-04-21 19:56, schrieb Sean Anderson:
>> Trust Architecture (TA) 2.1 devices include the LS1012A, LS1021A,
>> LS1043A, and LS1046A. The SFP device on TA 2.1 devices is very similar
>> to the SFP on TA 3.0 devices. The primary difference is a few fields in
>> the control register. Add a compatible string.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@...o.com>
>> ---
>>
>>  .../devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml    | 9 +++++++--
>>  1 file changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git
>> a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
>> b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
>> index e7d1232fcd41..aa277f1eee7e 100644
>> --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
>> +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
>> @@ -18,8 +18,13 @@ allOf:
>>
>>  properties:
>>    compatible:
>> -    enum:
>> -      - fsl,ls1028a-sfp
>> +    oneOf:
>> +      - description: Trust architecture 2.1 SFP
>> +        items:
>> +          - const: fsl,ls1021a-sfp
>> +      - description: Trust architecture 3.0 SFP
>> +        items:
>> +          - const: fsl,ls1028a-sfp
> 
> I'm unsure about this one. Esp. if you reuse the fsl,ls1028a-sfp
> compatible on other SoCs, there were some endianess issues with
> other IP blocks on the ls1028a. So it might be that on the LS1028A
> the IP has to accessed in little endian order and for other devices
> in big endian. I think we should add one compatible per SoC unless
> we know better.

It looks like I overlooked this. As you pointed out, there is indeed an
endianness difference between TA 2.1 and 3.0 platforms (see e.g. [1]).
Patch 8/8 will need to be updated. I think the easiest way to support
this may be to convert the driver to regmap and set the endiannes in the
config based on the compatible. We could also use the little-endian/
big-endian properties.

--Sean

[1] https://docs.nxp.com/bundle/GUID-487B2E69-BB19-42CB-AC38-7EF18C0FE3AE/page/GUID-EFF8FF41-C8C0-4A3B-AF95-E801D585B7C6.html