lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 21 Apr 2022 14:41:59 +0800
From:   Jacky Huang <ychuang3@...oton.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-clk@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <ychuang570808@...il.com>
CC:     <robh+dt@...nel.org>, <sboyd@...nel.org>, <krzk+dt@...nel.org>,
        <arnd@...db.de>, <olof@...om.net>, <will@...nel.org>,
        <soc@...nel.org>, <cfli0@...oton.com>
Subject: Re: [PATCH v3 3/5] arm64: dts: nuvoton: Add initial support for
 MA35D1



On 2022/4/18 下午 08:20, Krzysztof Kozlowski wrote:
> On 18/04/2022 10:27, Jacky Huang wrote:
>> Add the initial device tree files for Nuvoton MA35D1 Soc.
>>
> (...)
>
>> +	gic: interrupt-controller@...00000 {
> The unit address does not match first reg property. Don't you have
> warnings with this?

Yes, I will modify it as
gic: interrupt-controller@...01000

>
>> +		compatible = "arm,gic-400";
>> +		#interrupt-cells = <3>;
>> +		interrupt-parent = <&gic>;
>> +		interrupt-controller;
>> +		reg = <0x0 0x50801000 0x0 0x1000>,
>> +		      <0x0 0x50802000 0x0 0x2000>,
>> +		      <0x0 0x50804000 0x0 0x2000>,
>> +		      <0x0 0x50806000 0x0 0x2000>;
>> +		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0x13) |
>> +			      IRQ_TYPE_LEVEL_HIGH)>;
>> +	};
>> +};
> Best regards,
> Krzysztof

Thanks for your review.

Jacky Huang

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ