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Message-ID: <CAJF2gTQ2hdv5w5W-U=PxMsNZrL4ZPx=f_m93nZ3FSUfWUUJr3A@mail.gmail.com>
Date: Thu, 21 Apr 2022 14:46:16 +0800
From: Guo Ren <guoren@...nel.org>
To: Palmer Dabbelt <palmer@...osinc.com>
Cc: linux-riscv <linux-riscv@...ts.infradead.org>,
Randy Dunlap <rdunlap@...radead.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Anup Patel <anup@...infault.org>,
Vincent Chen <vincent.chen@...ive.com>,
Atish Patra <atishp@...osinc.com>,
Alexandre Ghiti <alexandre.ghiti@...onical.com>,
jszhang@...nel.org, Vitaly Wool <vitaly.wool@...sulko.com>,
gatecat@....me, Kefeng Wang <wangkefeng.wang@...wei.com>,
Nick Kossifidis <mick@....forth.gr>,
潘庆霖 <panqinglin2020@...as.ac.cn>,
Mike Rapoport <rppt@...nel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux@...osinc.com
Subject: Re: [PATCH v2 4/4] RISC-V: Fix the XIP build
Reviewed-by: Guo Ren <guoren@...nel.org>
On Thu, Apr 21, 2022 at 2:48 AM Palmer Dabbelt <palmer@...osinc.com> wrote:
>
> From: Palmer Dabbelt <palmer@...osinc.com>
>
> A handful of functions unused functions were enabled during XIP builds,
> which themselves didn't build correctly. This just disables the
> functions entirely.
>
> Fixes: e8a62cc26ddf ("riscv: Implement sv48 support")
> Signed-off-by: Palmer Dabbelt <palmer@...osinc.com>
> ---
> arch/riscv/mm/init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> index 7bc9a21e29fb..d2054a6cd791 100644
> --- a/arch/riscv/mm/init.c
> +++ b/arch/riscv/mm/init.c
> @@ -660,7 +660,7 @@ static __init pgprot_t pgprot_from_va(uintptr_t va)
> }
> #endif /* CONFIG_STRICT_KERNEL_RWX */
>
> -#ifdef CONFIG_64BIT
> +#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
> static void __init disable_pgtable_l5(void)
> {
> pgtable_l5_enabled = false;
> --
> 2.34.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
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